PIC18F4220-I/P Microchip Technology Inc., PIC18F4220-I/P Datasheet - Page 242

• Manufacturer Part Number: PIC18F4220-I/P
• Description: Microcontroller; 4 KB Flash; 512 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4220-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 4K Bytes
• Ram Size: 512 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2220/2320/4220/4320
REGISTER 23-4:
REGISTER 23-5:
DS39599C-page 240
bit 7
bit 6-2
bit 1
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RE3 input pin disabled
0 = RE3 input pin enabled; MCLR disabled
Unimplemented: Read as ‘0’
PBAD: PORTB A/D Enable bit (Affects ADCON1 Reset state. ADCON1 controls PORTB<4:0>
pin configuration.)
1 = PORTB<4:0> pins are configured as analog input channels on Reset
0 = PORTB<4:0> pins are configured as digital I/O on Reset
CCP2MX: CCP2 Mux bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug
Unimplemented: Read as ‘0’
LVP: Low-Voltage ICSP Enable bit
1 = Low-voltage ICSP enabled
0 = Low-voltage ICSP disabled
Unimplemented: Read as ‘0’
STVR: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
Legend:
R = Readable bit
- n = Value when device is unprogrammed
Legend:
R = Readable bit
- n = Value when device is unprogrammed
bit 7
bit 7
DEBUG
MCLRE
R/P-1
R/P-1
U-0
U-0
—
—
P = Programmable bit
C = Clearable bit
U-0
U-0
—
—
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
U-0
—
—
R/P-1
LVP
U-0
—
 2003 Microchip Technology Inc.
PBAD
R/P-1
U-0
—
CCP2MX
R/P-1
STVR
R/P-1
bit 0
bit 0