DSPIC30F2012-20I/SP Microchip Technology Inc., DSPIC30F2012-20I/SP Datasheet - Page 60
DSPIC30F2012-20I/SP
Manufacturer Part Number
DSPIC30F2012-20I/SP
Description
16 BIT MCU/DSP 28LD 20MIPS 12 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F2012-20ISP.pdf
(204 pages)
Specifications of DSPIC30F2012-20I/SP
A/d Inputs
10-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
20
Interface
I2C/SPI/UART, USART
Ios
20
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
1K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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dsPIC30F2011/2012/3012/3013
7.2
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bit set (input). If the TRIS bit is cleared
(output), the digital output level (V
converted.
When the PORT register is read, all pins configured as
analog input channels are read as cleared (a low level).
Pins configured as digital inputs will not convert an ana-
log input. Analog levels on any pin that is defined as a
digital input (including the ANx pins) may cause the
input buffer to consume current that exceeds the
device specifications.
DS70139D-page 58
Configuring Analog Port Pins
OH
or V
OL
) is
7.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 7-1:
MOV #0xF0, W0; Configure PORTB<7:4>
MOV W0, TRISB; and PORTB<3:0> as outputs
NOP
btss PORTB, #7; bit test RB7 and skip if set
I/O PORT WRITE/READ TIMING
; as inputs
; additional instruction cycle
PORT WRITE/READ
EXAMPLE
© 2006 Microchip Technology Inc.
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