PIC18F24J10-I/SS Microchip Technology Inc., PIC18F24J10-I/SS Datasheet - Page 221

• Manufacturer Part Number: PIC18F24J10-I/SS
• Description: Microcontroller; 16 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-SSOP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F24J10-I/SS

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SSOP
• Programmable Memory: 16K Bytes
• Ram Size: 1K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 2-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

18.0
The
comparators that can be configured in a variety of
ways. The inputs can be selected from the analog
inputs multiplexed with pins RA0 through RA5, as well
as the on-chip voltage reference (see Section 19.0
“Comparator Voltage Reference Module”). The digi-
tal outputs (normal or inverted) are available at the pin
level and can also be read through the control register.
REGISTER 18-1:
© 2006 Microchip Technology Inc.
analog
COMPARATOR MODULE
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
comparator
CMCON: COMPARATOR CONTROL REGISTER
C2OUT: Comparator 2 Output bit
When C2INV = 0:
1 = C2 V
0 = C2 V
When C2INV = 1:
1 = C2 V
0 = C2 V
C1OUT: Comparator 1 Output bit
When C1INV = 0:
1 = C1 V
0 = C1 V
When C1INV = 1:
1 = C1 V
0 = C1 V
C2INV: Comparator 2 Output Inversion bit
1 = C2 output inverted
0 = C2 output not inverted
C1INV: Comparator 1 Output Inversion bit
1 = C1 output inverted
0 = C1 output not inverted
CIS: Comparator Input Switch bit
When CM2:CM0 = 110:
1 = C1 V
0 = C1 V
CM2:CM0: Comparator Mode bits
Figure 18-1 shows the Comparator modes and the CM2:CM0 bit settings.
Legend:
R = Readable bit
-n = Value at POR
bit 7
C2OUT
R-0
C2 V
C2 V
module
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+ > C2 V
+ < C2 V
+ < C2 V
+ > C2 V
+ > C1 V
+ < C1 V
+ < C1 V
+ > C1 V
- connects to RA3/AN3/V
- connects to RA2/AN2/V
- connects to RA0/AN0
- connects to RA1/AN1
C1OUT
R-0
contains
IN
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
-
-
-
-
C2INV
R/W-0
Preliminary
two
W = Writable bit
‘1’ = Bit is set
REF
REF
C1INV
R/W-0
PIC18F45J10 FAMILY
The CMCON register (Register 18-1) selects the
comparator input and output configuration. Block
diagrams of the various comparator configurations are
shown in Figure 18-1.
+
-/CV
REF
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CIS
R/W-1
CM2
x = Bit is unknown
R/W-1
CM1
DS39682B-page 219
R/W-1
CM0
bit 0