PIC16C711-04/P Microchip Technology Inc., PIC16C711-04/P Datasheet - Page 22

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PIC16C711-04/P

Manufacturer Part Number
PIC16C711-04/P
Description
18 PIN, 1.75 KB OTP, 68 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16C711-04/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
OTP
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
68 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16C71X
4.2.2.6
The Power Control (PCON) register contains a flag bit
to allow differentiation between a Power-on Reset
(POR) to an external MCLR Reset or WDT Reset.
Those devices with brown-out detection circuitry con-
tain an additional bit to differentiate a Brown-out Reset
(BOR) condition from a Power-on Reset condition. For
the PIC16C715 the PCON register also contains status
bits MPEEN and PER. MPEEN reflects the value of the
MPEEN bit in the configuration word. PER indicates a
parity error reset has occurred.
FIGURE 4-12: PCON REGISTER (ADDRESS 8Eh), PIC16C710/711
FIGURE 4-13: PCON REGISTER (ADDRESS 8Eh), PIC16C715
DS30272A-page 22
Applicable Devices
bit7
bit7
bit 7-2: Unimplemented: Read as '0'
bit 1:
bit 0:
bit 7:
bit 6-3: Unimplemented: Read as '0'
bit 2:
bit 1:
bit 0:
MPEEN
R-U
U-0
PCON REGISTER
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
MPEEN: Memory Parity Error Circuitry Status bit
Reflects the value of configuration word bit, MPEEN
PER: Memory Parity Error Reset Status bit
1 = No Error occurred
0 = Program Memory Fetch Parity Error occurred (must be set in software after a Parity Error Reset)
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
U-0
U-0
U-0
U-0
710 71 711 715
U-0
U-0
U-0
U-0
R/W-1
PER
U-0
R/W-0
R/W-0
POR
POR
Note:
BOR
BOR is unknown on Power-on Reset. It
must then be set by the user and checked
on subsequent resets to see if BOR is
clear, indicating a brown-out has occurred.
The BOR status bit is a don't care and is
not necessarily predictable if the brown-out
circuit is disabled (by clearing the BODEN
bit in the Configuration word).
R/W-q
R/W-q
BOR
(1)
bit0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1997 Microchip Technology Inc.
read as ‘0’
read as ‘0’

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