PIC17C756A-16I/L Microchip Technology Inc., PIC17C756A-16I/L Datasheet - Page 162
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PIC17C756A-16I/L
Manufacturer Part Number
PIC17C756A-16I/L
Description
68 PIN, 32 KB OTP, 902 RAM, 50 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC17C756A-16IL.pdf
(304 pages)
Specifications of PIC17C756A-16I/L
A/d Inputs
12-Channel, 10-Bit
Cpu Speed
8.25 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
32K Bytes
Ram Size
902 Bytes
Speed
16 MHz
Timers
2-8-bit, 2-16-bit
Voltage, Range
3-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C756A-16I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC17C756A-16I/L
Manufacturer:
MICROCH
Quantity:
20 000
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PIC17C7XX
15.2.12
Master mode reception is enabled by programming the
receive enable bit, RCEN (SSPCON2<3>).
The baud rate generator begins counting and on each
rollover, the state of the SCL pin changes (high to low/
low to high) and data is shifted into the SSPSR. After
the falling edge of the eighth clock, the receive enable
flag is automatically cleared, the contents of the
SSPSR are loaded into the SSPBUF, the BF flag is set,
the SSPIF is set and the baud rate generator is sus-
pended from counting, holding SCL low. The SSP is
now in IDLE state, awaiting the next command. When
the buffer is read by the CPU, the BF flag is automati-
cally cleared. The user can then send an acknowledge
bit at the end of reception, by setting the acknowledge
sequence enable bit, ACKEN (SSPCON2<4>).
DS30289B-page 162
Note:
The SSP Module must be in an IDLE
STATE before the RCEN bit is set, or the
RCEN bit will be disregarded.
I
2
C MASTER MODE RECEPTION
15.2.12.1
In receive operation, BF is set when an address or data
byte is loaded into SSPBUF from SSPSR. It is cleared
when SSPBUF is read.
15.2.12.2
In receive operation, SSPOV is set when 8 bits are
received into the SSPSR, and the BF flag is already set
from a previous reception.
15.2.12.3
If the user writes the SSPBUF when a receive is
already in progress (i.e., SSPSR is still shifting in a data
byte), then WCOL is set and the contents of the buffer
are unchanged (the write doesn’t occur).
BF Status Flag
SSPOV Status Flag
WCOL Status Flag
2000 Microchip Technology Inc.
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