DS2181A+ Maxim Integrated Products, DS2181A+ Datasheet - Page 20

• Manufacturer Part Number: DS2181A+
• Description: IC TXRX CEPT PRIMARY RATE 40-DIP
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS2181A+

• Number Of Drivers/receivers: 1/1
• Protocol: CEPT
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Logic Type: CMOS
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• High Level Output Current: - 1 mA
• Interface: DMA, CPI
• Low Level Output Current: 4 mA
• Minimum Operating Temperature: 0 C
• Output Current: 4 mA
• Supply Current: 5 mA
• Supply Voltage Range: 4.5V To 5.5V
• Logic Case Style: LCC
• No. Of Pins: 44
• Operating Temperature Range: 0°C To +70°C
• Termination Type: SMD
• Transceiver Type: Network
• Driver Case Style: LCC
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Interface Type: Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RSR: RECEIVE STATUS REGISTER Figure 18
(MSB)
NOTE:
1. When in the CCS mode, the RDMA flag bit and the RDMA pin have no significance. It will be set
SYMBOL
MFSERR
when bit 6 of timeslot 16 in frame 0 is set for three consecutive multiframes in either CAS or CCS
mode.
RDMA
FSERR
RUA1
RLOS
RRA
RSA1
RRA
ECS
RDMA
POSITION
RSR.7
RSR.6
RSR.5
RSR.4
RSR.3
RSR.2
RSR.1
RSR.0
RSA1
NAME AND DESCRIPTION
Receive Remote Alarm. Set when bit 3 of timeslot 0 in non-align
frames set for three consecutive non-align frames.
Receive Distant Multiframe Alarm. Set when bit 6 of timeslot 16
in frame 0 is set for three consecutive multiframes.
Receive Signaling All Ones. Set when the contents of timeslot 16
have been all 1's for two consecutive frames.
Receive Unframed All Ones. Set when less than three 0s have
been received in the last two consecutive frames.
Frame Resync Criteria Met. Set when the frame error criteria are
met; also the frame resync is initiated if RCR.1=0.
CAS Multiframe Resync Criteria Met. Set when the CAS
multiframe error criteria are met; also, the frame resync is initiated
if RCR.1=0.
Receive Loss of Sync. Set when resync is in progress.
Error Counter Saturation. Set when any of the on-chip counters
at FECR, CECR or BVCR saturates.
RUA1
20 of 32
FSERR
MFSERR
RLOS
(LSB)
DS2181A
ECS