PIC12C509A-04/P Microchip Technology Inc., PIC12C509A-04/P Datasheet - Page 20

• Manufacturer Part Number: PIC12C509A-04/P
• Description: 8 PIN, 1.5 KB OTP, 41 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12C509A-04/P

• Cpu Speed: 1 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 5
• Memory Capacity: 1024 Bytes
• Memory Type: OTP
• Number Of Bits: 8
• Number Of Leads: 6
• Package Type: 8-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 41 Bytes
• Speed: 4 MHz
• Timers: 1-8-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12C5XX
4.8
The INDF register is not a physical register.
Addressing INDF actually addresses the register
whose address is contained in the FSR register (FSR
is a pointer ). This is indirect addressing.
EXAMPLE 4-1:
• Register file 07 contains the value 10h
• Register file 08 contains the value 0Ah
• Load the value 07 into the FSR register
• A read of the INDF register will return the value
• Increment the value of the FSR register by one
• A read of the INDR register now will return the
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 10h-1Fh
using indirect addressing is shown in Example 4-2.
FIGURE 4-9:
DS40139E-page 20
of 10h
(FSR = 08)
value of 0Ah.
Indirect Data Addressing; INDF and
FSR Registers
bank select
DIRECT/INDIRECT ADDRESSING
(FSR)
6
INDIRECT ADDRESSING
Note 1: For register map detail see Section 4.2.
Note 2: PIC12C509, PIC12C509A, PIC12CR509A, PIC12CE519.
5
Direct Addressing
location select
Data
Memory
4
(opcode)
(1)
00h
0Fh
10h
0
1Fh
Bank 0
00
3Fh
Bank 1
Addresses
map back to
addresses
in Bank 0.
EXAMPLE 4-2:
NEXT
CONTINUE
The FSR is a 5-bit wide register. It is used in
conjunction with the INDF register to indirectly address
the data memory area.
The FSR<4:0> bits are used to select data memory
addresses 00h to 1Fh.
PIC12C508/PIC12C508A/PIC12CE518:
use banking. FSR<7:5> are unimplemented and read
as '1's.
PIC12C509/PIC12C509A/PIC12CR509A/
PIC12CE519: Uses FSR<5>. Selects between bank 0
and bank 1. FSR<7:6> is unimplemented, read as '1’ .
01
(2)
movlw
movwf
clrf
incf
btfsc
goto
:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
0x10
FSR
INDF
FSR,F
FSR,4
NEXT
6
Indirect Addressing
1999 Microchip Technology Inc.
bank
5
4
;initialize pointer
; to RAM
;clear INDF register
;inc pointer
;all done?
;NO, clear next
;YES, continue
location select
(FSR)
Does not
0