DSPIC30F2023-30I/PT Microchip Technology Inc., DSPIC30F2023-30I/PT Datasheet - Page 215
DSPIC30F2023-30I/PT
Manufacturer Part Number
DSPIC30F2023-30I/PT
Description
DSP, 16-Bit, 12KB Flash, 512 RAM, 35 I/O, TQFP-44
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F2023-30IPT.pdf
(286 pages)
Specifications of DSPIC30F2023-30I/PT
A/d Inputs
12-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
35
Interface
I2C/SPI/UART
Ios
35
Memory Type
Flash
Number Of Bits
16
Package Type
44-pin TQFP
Programmable Memory
12K Bytes
Ram Size
512 Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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Table 18-3 shows the Reset conditions for the RCON
register. Since the control bits within the RCON register
are R/W, the information in the table implies that all the
bits are negated prior to the action specified in the
condition column.
TABLE 18-3:
Table 18-4 shows a second example of the bit
conditions for the RCON register. In this case, it is not
assumed the user has set/cleared specific bits prior to
action specified in the condition column.
TABLE 18-4:
© 2006 Microchip Technology Inc.
Power-on Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from
Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Trap
Note 1:
Power-on Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from
Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Reset
Legend: u = unchanged
Note 1:
Condition
Condition
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
INITIALIZATION CONDITION FOR RCON REGISTER CASE 1
INITIALIZATION CONDITION FOR RCON REGISTER CASE 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
Program
PC + 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
Counter
Program
PC + 2
Counter
PC + 2
PC + 2
(1)
(1)
TRAPR
TRAPR IOPUWR EXTR SWR WDTO IDLE SLEEP
0
0
0
0
0
0
0
0
0
1
0
0
u
u
u
u
u
u
u
u
1
u
Preliminary
IOPUWR
0
u
u
u
u
u
u
u
u
u
1
0
0
0
0
0
0
0
0
0
0
1
dsPIC30F1010/202X
EXTR SWR WDTO IDLE SLEEP
0
1
0
1
1
0
u
u
u
u
u
0
1
0
1
1
0
0
0
0
0
0
0
0
1
u
u
0
u
u
u
u
u
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
u
u
u
u
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
0
u
u
u
u
u
0
0
0
0
1
0
0
0
0
0
0
DS70178C-page 213
0
0
0
1
0
0
1
1
u
u
u
0
0
0
1
0
0
1
1
0
0
0
POR
POR
1
u
u
u
u
u
u
u
u
u
u
1
0
0
0
0
0
0
0
0
0
0
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