TDA8020HL/C1,118 NXP Semiconductors, TDA8020HL/C1,118 Datasheet - Page 12

• Manufacturer Part Number: TDA8020HL/C1,118
• Description: IC SMART CARD INTERFACE 32LQFP
• Manufacturer: NXP Semiconductors
• Type: Interfacer

Specifications of TDA8020HL/C1,118

• Voltage - Supply: 2.7 V ~ 6.5 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Other names: 568-3523-2; 935267381118; TDA8020HLBD-T

Philips Semiconductors
Deactivation is initiated either by the system controller
(reset bit START), or automatically in the event of a
hardware problem or supply drop-out. With a supply
drop-out both cards are deactivated at the same time.
During deactivation, RST goes LOW, the clock is stopped
and the I/O lines go LOW. V
controlled slope and the DC-to-DC converter is stopped if
no card is active.
Outside a session, cards contacts are forced low
impedance to CGND.
D
1. If a start bit is detected on the I/O during the first
2. If a start bit is detected whilst RST is LOW (between
3. If no start bit has been detected until after 42100 CLK
4. If a start bit is detected within 370 CLK pulses, bit
5. If the card does not respond within the next 42100
6. If the card responds within the correct window period,
Deactivation is initiated either by the system controller
(reset bit START), or automatically in the event of a
hardware problem or supply drop-out. With a supply
drop-out both cards are deactivated at the same time.
During deactivation, RST goes LOW, the clock is stopped
and the I/O lines go LOW. V
controlled slope and the DC-to-DC converter is stopped if
no card is active.
Outside a session, cards contacts are forced low
impedance to CGND.
2003 Nov 06
EVICE TYPE
Dual IC card interface
200 CLK pulses, it is ignored and the count continues.
200 and 42100 CLK pulses), bits EARLY and MUTE
are set in the status register; RST will remain LOW; the
software decides whether to accept the card or not.
pulses, RST is set to logic 1.
EARLY is set in the status register.
CLK pulses, bit MUTE is set within the status register.
This initiates a warm reset command.
the CLK count is stopped and the system controller
may send commands to the card.
TDA8020HL/C2:
CC
CC
then goes low with a
then goes low with a
12
Activation sequence
When the cards are inactive, V
LOW, with low impedance with respect to CGND. The
DC-to-DC converter is stopped.
When everything is satisfactory (voltage supply, card
present and no hardware problems), the system controller
may initiate a card present activation sequence
(see Fig.4):
1. The internal oscillator changes to its high frequency
2. The DC-to-DC converter is started (t1). If one card was
3. V
4. I/O rises to V
5. CLK is sent to the card and RST is enabled (t4 = t
If the card does not respond within the first 42100 CLK
cycles, then RST is raised HIGH (t5).
The sequencer is clocked by f
interval T of 25 s typical. Thus t1 = 0 to T/64;
t2 = t1 + 3T/2; t3 = t1 + 7T/2 and t4 = t1 + 4T.
(t0).
already active, then the DC-to-DC converter was
already on, and nothing more occurs at this step.
rise time of 0.14 V/ s typical (t2).
V
CC
CC
.
starts rising from 0 to 5 or 3 V with a controlled
CC
(t3); internal 14 k pull-up resistors to
int
CC
/64 which leads to a time
, CLK, RST and I/O are
TDA8020HL
Product specification
act
).