DS90CR217MTD/NOPB National Semiconductor, DS90CR217MTD/NOPB Datasheet

IC TXRX 21BIT CHAN LINK 48TSSOP

DS90CR217MTD/NOPB

Manufacturer Part Number
DS90CR217MTD/NOPB
Description
IC TXRX 21BIT CHAN LINK 48TSSOP
Manufacturer
National Semiconductor
Type
Transmitterr
Datasheet

Specifications of DS90CR217MTD/NOPB

Protocol
RS644
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Supply Current
57mA
Supply Voltage Range
3V To 3.6V
Driver Case Style
TSSOP
No. Of Pins
48
Operating Temperature Range
-10°C To +70°C
Msl
MSL 2 - 1 Year
Device Type
Clock
Termination Type
SMD
Rohs Compliant
Yes
Filter Terminals
SMD
Esd Hbm
7kV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
*DS90CR217MTD
*DS90CR217MTD/NOPB
DS90CR217MTD
© 2006 National Semiconductor Corporation
DS90CR217
+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel
Link - 85 MHz
General Description
The DS90CR217 transmitter converts 21 bits of CMOS/TTL
data into three LVDS (Low Voltage Differential Signaling)
data streams. A phase-locked transmit clock is transmitted in
parallel with the data streams over a fourth LVDS link. Every
cycle of the transmit clock 21 bits of input data are sampled
and transmitted. At a transmit clock frequency of 85 MHz, 21
bits of TTL data are transmitted at a rate of 595 Mbps per
LVDS data channel. Using a 85 MHz clock, the data through-
put is 1.785 Gbit/s (223 Mbytes/sec).
The narrow bus and LVDS signalling of the DS90CR217 is
an ideal means to solve EMI and cable size problems asso-
ciated with wide, high-speed TTL interfaces.
Block Diagram
See NS Package Number MTD48
Order Number DS90CR217MTD
DS90CR217
DS201903
20190301
Features
n 20 to 85 MHz shift clock support
n 50% duty cycle on receiver output clock
n Best-in-Class Set & Hold Times on TxINPUTs
n Low power consumption
n
n Narrow bus reduces cable size and cost
n Up to 1.785 Gbps throughput
n Up to 223 Mbytes/sec bandwidth
n 345 mV (typ) swing LVDS devices for low EMI
n PLL requires no external components
n Rising edge data strobe
n Compatible with TIA/EIA-644 LVDS standard
n Low profile 48-lead TSSOP package
Connection Diagrams
±
1V common-mode range (around +1.2V)
DS90CR217
20190321
October 2006
www.national.com

Related parts for DS90CR217MTD/NOPB

DS90CR217MTD/NOPB Summary of contents

Page 1

... TTL interfaces. Block Diagram DS90CR217 Order Number DS90CR217MTD See NS Package Number MTD48 © 2006 National Semiconductor Corporation Features MHz shift clock support n 50% duty cycle on receiver output clock n Best-in-Class Set & Hold Times on TxINPUTs n Low power consumption ± ...

Page 2

Typical Application www.national.com 2 20190323 ...

Page 3

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( CMOS/TTL Input Voltage −0. CMOS/TTL Output Voltage −0. LVDS Receiver Input Voltage −0. LVDS Driver Output Voltage −0. LVDS Output Short ...

Page 4

Transmitter Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified Symbol LLHT LVDS Low-to-High Transition Time (Figure 2) LHLT LVDS High-to-Low Transition Time (Figure 2) TCIT TxCLK IN Transition Time (Figure 3) TPPos0 Transmitter Output Pulse Position ...

Page 5

AC Timing Diagrams FIGURE 2. DS90CR217 (Transmitter) LVDS Output Load and Transition Times FIGURE 3. D590CR217 (Transmitter) Input Clock Transition Time FIGURE 1. “Worst Case” Test Pattern 20190303 5 20190302 20190304 20190307 www.national.com ...

Page 6

AC Timing Diagrams Note 5: Measurements DIFF Note 6: TCCS measured between earliest and latest LVDS edges Note 7: TxCLK Differential Low → High Edge FIGURE 4. DS90CR217 (Transmitter) Channel-to-Channel Skew FIGURE 5. DS90CR217 (Transmitter) Setup/Hold ...

Page 7

AC Timing Diagrams (Continued) FIGURE 7. DS90CR217 (Transmitter) Phase Lock Loop Set Time FIGURE 8. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs (DS90CR217) FIGURE 9. Transmitter Powerdown Delay 7 20190313 20190316 20190317 www.national.com ...

Page 8

AC Timing Diagrams FIGURE 10. Transmitter LVDS Output Pulse Position Measurement Applications Information DS90CR217 Pin Descriptions — Channel Link Transmitter Pin Name I/O No. TxIN I 21 TTL level input. TxOUT Positive LVDS differential data output. TxOUT− O ...

Page 9

Applications Information and with the maximum data transfer of 1.785 Gbit/s. Addi- tional applications information can be found in the following National Interface Application Notes #### Topic AN-1041 Introduction to Channel Link AN-1108 Channel Link PCB and Interconnect ...

Page 10

Applications Information DECOUPLING CAPACITORS Bypassing capacitors are needed to reduce the impact of switching noise which could limit performance. For a conser- vative approach three parallel-connected decoupling capaci- tors (Multi-Layered Ceramic type in surface mount form fac- tor) between each ...

Page 11

Applications Information FIGURE 13. Single-Ended and Differential Waveforms (Continued) 11 20190326 www.national.com ...

Page 12

... BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/quality/green. ...

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