AD9958BCPZ Analog Devices Inc, AD9958BCPZ Datasheet - Page 7

• Manufacturer Part Number: AD9958BCPZ
• Description: IC DDS DUAL 500MSPS DAC 56LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9958BCPZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) Phase Coherent FSK Modulator (CN0186)
• Resolution (bits): 10 b
• Master Fclk: 500MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 1.71 V ~ 1.96 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Pll Type: Frequency Synthesis
• Frequency: 500MHz
• Supply Current: 105mA
• Supply Voltage Range: 1.71V To 1.89V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 56
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9958/PCBZ - BOARD EVALUATION FOR AD9958
• Lead Free Status / Rohs Status: Compliant

Parameter
POWER SUPPLY
DATA LATENCY (PIPELINE DELAY) SINGLE-TONE MODE
DATA LATENCY (PIPELINE DELAY) MODULATION MODE
DATA LATENCY (PIPELINE DELAY) LINEAR SWEEP MODE
1
2
3
4
For the VCO frequency range of 160 MHz to 255 MHz, there is no guarantee of operation.
Data latency is referenced to I/O_UPDATE.
Data latency is fixed.
Data latency is referenced to a profile change.
Total Power Dissipation—Both Channels On, Single-
Total Power Dissipation—Both Channels On, with
Total Power Dissipation—Full Power-Down
I
I
I
I
I
I
I
Frequency, Phase, and Amplitude Words to DAC
Frequency Word to DAC Output with Matched
Phase Offset Word to DAC Output with Matched
Amplitude Word to DAC Output with Matched
Frequency Word to DAC Output
Phase Offset Word to DAC Output
Amplitude Word to DAC Output
Frequency Rising/Falling Delta-Tuning Word to DAC
Phase Offset Rising/Falling Delta-Tuning Word to
Amplitude Rising/Falling Delta-Tuning Word to DAC
AVDD
AVDD
DVDD
DVDD
DVDD_I/O
AVDD
DVDD
Tone Mode
Sweep Accumulator
REFCLK Multiplier, and 10-Bit Output Scalar
Enabled
REFCLK Multiplier, and 10-Bit Output Scalar
Enabled
Output with Matched Latency Enabled
Latency Disabled
Latency Disabled
Latency Disabled
Output
DAC Output
Output
—Both Channels On, Single-Tone Mode
—Both Channels On, Sweep Accumulator,
—Both Channels On, Single-Tone Mode
—Both Channels On, Sweep Accumulator,
Power-Down Mode
Power-Down Mode
2, 3
3, 4
3, 4
Min
29
29
25
17
34
29
21
41
37
29
Rev. A | Page 7 of 44
Typ
315
350
13
90
95
60
70
Max
380
420
105
110
70
80
22
30
2.5
2.5
Unit
mW
mW
mW
mA
mA
mA
mA
mA
mA
mA
mA
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
Test Conditions/Comments
Dominated by supply variation
Dominated by supply variation
I
I
DVDD
DVDD
= read
= write
AD9958