DP83902AVLJ National Semiconductor, DP83902AVLJ Datasheet - Page 14

• Manufacturer Part Number: DP83902AVLJ
• Description: IC CTRLR SER NETWORK IN 100PQFP
• Manufacturer: National Semiconductor

Specifications of DP83902AVLJ

• Controller Type: Serial Network Interface Controller
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 140mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83902AVLJ

7 0 Packet Reception
The Local DMA receive channel uses a Buffer Ring Struc-
ture comprised of a series of contiguous fixed length
256-byte (128 word) buffers for storage of received packets
The location of the Receive Buffer Ring is programmed in
two registers a Page Start and a Page Stop Register Ether-
net packets consist of a distribution of shorter link control
packets and longer data packets the 256-byte buffer length
provides a good compromise between short packets and
longer packets to most efficiently use memory In addition
these buffers provide memory resources for storage of
back-to-back packets in loaded networks The assignment
of buffers for storing packets is controlled by Buffer Man-
agement Logic in the ST-NIC The Buffer Management Log-
ST-NIC Receive Buffer Ring
14
ic provides three basic functions linking receive buffers for
long packets recovery of buffers when a packet is rejected
and recirculation of buffer pages that have been read by the
host
At initialization a portion of the 64 kbyte (or 32k word) ad-
dress space is reserved for the receive buffer ring Two 8-bit
registers the Page Start Address Register (PSTART) and
the Page Stop Address Register (PSTOP) define the physi-
cal boundaries of where the buffers reside The ST-NIC
treats the list of buffers as a logical ring whenever the DMA
address reaches the Page Stop Address the DMA is reset
to the Page Start Address
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