CY7C68300B-56LFXC Cypress Semiconductor Corp, CY7C68300B-56LFXC Datasheet - Page 21

• Manufacturer Part Number: CY7C68300B-56LFXC
• Description: IC USB 2.0 BRIDGE BULK 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C68300B-56LFXC

• Controller Type: USB 2.0 Controller
• Interface: I²C
• Voltage - Supply: 3.15 V ~ 3.45 V
• Current - Supply: 50mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 8-6. EEPROM Organization (continued)
Document 38-08033 Rev. *D
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
EEPROM
Address
ATA_EN
DISKRDY Polarity
HS Indicator Enable
Drive Power Valid Polarity
Drive Power Valid Enable
Reserved
General Purpose IO Pin
Output Enable
Reserved
General Purpose IO Pin Data
Identify Device String Pointer
LUN0
Identify Device String Pointer
LUN1
Delay after reset
Reserved
Enable CF UDMA
Fixed number of logical
units = 2
Field Name
Bit (4)
ATA sharing enable. Allows ATA bus sharing with other host
devices. If ATA_EN=1 the ATA interface will be driven when
VBUS_ATA_ENABLE is LOW. If ATA_EN=0 the ATA
interface will be placed into Hi-Z state whenever
VBUS_ATA_ENABLE is LOW.
‘0’ = ATA signals Hi-Z when VBUS_ATA_ENABLE is LOW.
‘1’ = ATA signals driven when VBUS_ATA_ENABLE is LOW.
Bit (3)
DISKRDY active polarity.
‘0’ = Active LOW polarity.
‘1’ = Active HIGH polarity.
Bit (2)
Enables GPIO2_nHS pin to indicate the current operating
speed of the device (if output is enabled).
‘0’ = Normal GPIO operation.
‘1’ = High-speed indicator enable.
Bit (1)
Controls the polarity of DRVPWRVLD pin
‘0’ = Active LOW (“connector ground” indication)
‘1’ = Active HIGH (power indication from device)
Bit (0)
Enable for the DRVPWRVLD pin. When this pin is enabled,
the AT2LP will enumerate a removable IDE device (normally
CompactFlash) as the master device.
‘0’ = pin disabled (most systems)
‘1’ = pin enabled (CompactFlash systems)
Bits (7:6)
Must be set to zero.
Bits (5:0)
GPIO[5:0] Hi-Z control.
‘0’ = Output enabled (GPIO pin is an output).
‘1’ = Hi-Z (GPIO pin is an input).
Bits (7:6)
Must be set to zero.
Bits (5:0)
If the output enable bit is set, these bits select the value
driven on the GPIO pins.
If this value is 00, the Identify Device data will be taken from
the device. If this string is non-zero, it is used as a pointer to
a 24 byte ASCII (non-Unicode) string in the EEPROM. This
string will be used as the device identifier. This string is used
by many operating systems as the user-visible name for the
device.
Number of 20-ms ticks to wait between RESET and
attempting to access the drive.
Bits (7:4)
Bit (3)
‘1’ = Allow UDMA to be used with removable-media devices
‘0’ = UDMA will not be used with removable-media devices
Some CF devices will interfere with UDMA if the UDMA lines
are connected to them. This bit tells the AT2LP if the UDMA
lines are connected to the removable-media device.
Bit (2)
If bits 1 and 2 are both 0, the number of logical units will be
determined by searching the ATA and CF buses for devices.
Field Description
CY7C68300B/CY7C68301B
CY7C68320/CY7C68321
Required
Contents
Page 21 of 36
Suggested
Contents
0x00
0x00
0x00
0x00
0x00
0x00