FDC37C669-MT SMSC, FDC37C669-MT Datasheet - Page 29

IC CTRLR SUPER I/O FLPPY 100TQFP

FDC37C669-MT

Manufacturer Part Number
FDC37C669-MT
Description
IC CTRLR SUPER I/O FLPPY 100TQFP
Manufacturer
SMSC
Datasheet

Specifications of FDC37C669-MT

Controller Type
I/O Controller
Interface
ISA Host
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
25mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1008

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37C669-MT
Manufacturer:
Microchip Technology
Quantity:
10 000
MAIN STATUS REGISTER
Address 3F4 READ ONLY
The Main Status Register is a read-only register and
indicates the status of the disk controller. The
Status
BIT 0 - 3 DRV x BUSY
These bits are set to 1s when a drive is in the seek
portion of a command, including implied and overlapped
seeks and recalibrates.
BIT 4 COMMAND BUSY
This bit is set to a 1 when a command is in progress.
This bit will go active after the command byte has been
accepted and goes inactive at the end of the results
phase. If there is no result phase (Seek, Recalibrate
commands), this bit is returned to a 0 after the last
command byte.
RQM
Register
7
DIO
6
can
NON
DMA
5
be
read
BUSY
CMD
4
at
Main
any
DRV3
BUSY
3
29
time. The MSR indicates when the disk controller is ready
to receive data via the Data Register. It should be read
before each byte transferring to or from the data register
except in DMA mode. NO delay is required when reading
the MSR after a data transfer.
BIT 5 NON-DMA
This mode is selected in the SPECIFY command and will
be set to a 1 during the execution phase of a command.
This is for polled data transfers and helps differentiate
between the data transfer phase and the reading of result
bytes.
BIT 6 DIO
Indicates the direction of a data transfer once a RQM is
set. A 1 indicates a read and a 0 indicates a write is
required.
BIT 7 RQM
Indicates that the host can transfer data if set to a 1. No
access is permitted if set to a 0.
DRV2
BUSY
2
DRV1
BUSY
1
BUSY
DRV0
0

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