FDC37B727-NS SMSC, FDC37B727-NS Datasheet - Page 212

• Manufacturer Part Number: FDC37B727-NS
• Description: IC CTRLR SUPER I/O ENH 128-QFP
• Manufacturer: SMSC

Specifications of FDC37B727-NS

• Controller Type: I/O Controller
• Interface: ISA Host
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 30mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1005

CLOCK TIMING
Note 1: The RESET width is dependent upon the processor clock. The RESET must be active while
CLOCKI
RESET_DRV
NAME
NAME
t1
t2
t1
t2
t4
the clock is running and stable.
Clock Cycle Time for 14.318MHZ
Clock High Time/Low Time for 14.318MHz
Clock Cycle Time for 32KHZ
Clock High Time/Low Time for 32KHz
Clock Rise Time/Fall Time (not shown)
RESET width (Note 1)
DESCRIPTION
FIGURE 17 - INPUT CLOCK TIMING
DESCRIPTION
TABLE 85 - INPUT CLOCK TIMING
FIGURE 18 - RESET TIMING
TABLE 86 - RESET TIMING
213
t4
t2
MIN
MIN
1.5
31.25
16.53
TYP
70
35
TYP
t2
MAX
MAX
5
UNITS
UNITS
ns
ns
μs
μs
ns
s