KSZ8873MLL AM Micrel Inc, KSZ8873MLL AM Datasheet - Page 32

• Manufacturer Part Number: KSZ8873MLL AM
• Description: IC ETHERNET SWITCH 3PORT 64-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8873MLL AM

• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant
• Other names: 576-3633; KSZ8873MLL AM; KSZ8873MLLAM

Micrel, Inc.
SMI register access is the same as the MIIM register access, except for the register access requirements presented in
this section.
Advanced Switch Functions
Bypass Mode
The KSZ8873MLL/FLL/RLL also offer a by-pass mode, which enables system-level power saving. When the CPU
(connected to Port 3) enters a power saving mode, the KSZ8873MLL/FLL/RLL automatically switches to the bypass mode
in which the switch function between Port1 and Port2 is sustained.
IEEE 802.1Q VLAN Support
The KSZ8873MLL/FLL/RLL supports 16 active VLANs out of the 4096 possible VLANs specified in the IEEE 802.1Q
specification. KSZ8873MLL/FLL/RLL provides a 16-entries VLAN Table, which converts the 12-bits VLAN ID (VID) to the
4-bits Filter ID (FID) for address lookup. If a non-tagged or null-VID-tagged packet is received, the ingress port default VID
is used for lookup. In VLAN mode, the lookup process starts with VLAN Table lookup to determine whether the VID is
valid. If the VID is not valid, the packet is dropped and its address is not learned. If the VID is valid, the FID is retrieved for
further lookup. The FID + Destination Address (FID+DA) are used to determine the destination port. The FID + Source
Address (FID+SA) are used for address learning.
Advanced VLAN features, such as “Ingress VLAN filtering” and “Discard Non PVID packets” are also supported by the
KSZ8873MLL/FLL/RLL. These features can be set on a per port basis, and are defined in register 18, 34 and 50 for ports
1, 2 and 3, respectively.
September 2009
Registers are 8 data bits wide.
DA found in
Static MAC
Table?
No
No
Yes
Yes
Yes
Yes
For read operation, data bits [15:8] are read back as 0’s.
For write operation, data bits [15:8] are not defined, and hence can be set to either ‘0’ or ‘1’.
FID+SA found in Dynamic MAC Table?
No
Yes
Use FID flag?
Don’t care
Don’t care
0
1
1
1
Table 10. FID+DA Lookup in VLAN Mode
Table 11. FID+SA Lookup in VLAN Mode
Don’t care
FID match?
Don’t care
Don’t care
No
No
Yes
Action
Learn and add FID+SA to the Dynamic MAC Address Table
Update time stamp
DA+FID
found in
Dynamic
MAC Table?
No
Yes
Don’t care
No
Yes
Don’t care
32
Action
Broadcast to the membership ports
defined in the VLAN Table bits [18:16]
Send to the destination port defined in the
Dynamic MAC Address Table bits [53:52]
Send to the destination port(s) defined in
the Static MAC Address Table bits [50:48]
Broadcast to the membership ports
defined in the VLAN Table bits [18:16]
Send to the destination port defined in the
Dynamic MAC Address Table bits [53:52]
Send to the destination port(s) defined in
the Static MAC Address Table bits [50:48]
KSZ8873MLL/FLL/RLL
M9999-092309-1.2