MCP2515T-I/ST Microchip Technology, MCP2515T-I/ST Datasheet - Page 36
![IC CAN CONTROLLER W/SPI 20TSSOP](/photos/6/81/68121/150-20-tssop_sml.jpg)
MCP2515T-I/ST
Manufacturer Part Number
MCP2515T-I/ST
Description
IC CAN CONTROLLER W/SPI 20TSSOP
Manufacturer
Microchip Technology
Specifications of MCP2515T-I/ST
Controller Type
CAN Interface
Interface
SPI
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Ic Interface Type
SPI
Supply Voltage Range
2.7V To 5.5V
Digital Ic Case Style
TSSOP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Peak Reflow Compatible (260 C)
Yes
Interface Type
SPI
Supply Voltage Min
2.7V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP2515DM-BM - BOARD DEMO FOR MCP2515/51MCP2515DM-PTPLS - BOARD DAUGHTER PICTAIL MCP2515MCP2515DM-PCTL - BOARD DEMO FOR MCP2515DV251001 - KIT DEVELOPMENT CAN MCP2510
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP2515T-I/ST
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP2515
REGISTER 4-15:
\
REGISTER 4-16:
REGISTER 4-17:
DS21801E-page 36
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-0
R/W-0
EID15
R/W-0
SID2
EID7
SID: Standard Identifier Mask bits <2:0>
These bits hold the mask bits to be applied to bits<2:0> of the Standard Identifier portion of a received
message
Unimplemented: Reads as ‘0’
EID: Extended Identifier Mask bits <17:16>
These bits hold the mask bits to be applied to bits <17:16> of the Extended Identifier portion of a
received message
EID: Extended Identifier bits <15:8>
These bits hold the filter bits to be applied to bits <15:8> of the Extended Identifier portion of a received
message
EID: Extended Identifier Mask bits <7:0>
These bits hold the mask bits to be applied to the bits <7:0> of the Extended Identifier portion of a
received message
R/W-0
R/W-0
EID14
R/W-0
SID1
EID6
RXMnSIDL – MASK n STANDARD IDENTIFIER LOW
(ADDRESS: 21h, 25h)
RXMnEID8 – MASK n EXTENDED IDENTIFIER HIGH
(ADDRESS: 22h, 26h)
RXMnEID0 – MASK n EXTENDED IDENTIFIER LOW
(ADDRESS: 23h, 27h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
EID13
R/W-0
SID0
EID5
R/W-0
R/W-0
EID12
EID4
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
EID11
EID3
U-0
—
R/W-0
EID10
R/W-0
EID2
U-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-0
EID17
R/W-0
R/W-0
EID9
EID1
R/W-0
EID16
R/W-0
R/W-0
EID8
EID0
bit 0
bit 0
bit 0