KSZ8873FLLI Micrel Inc, KSZ8873FLLI Datasheet - Page 45

IC ETHERNET SWITCH 3PORT 64LQFP

KSZ8873FLLI

Manufacturer Part Number
KSZ8873FLLI
Description
IC ETHERNET SWITCH 3PORT 64LQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8873FLLI

Controller Type
Ethernet Switch Controller
Interface
MII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
576-3632
KSZ8873FLLI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8873FLLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873FLLI
0
Micrel, Inc.
PHY1 Register 0 (PHYAD = 0x1, REGAD = 0x0): MII Basic Control
PHY2 Register 0 (PHYAD = 0x2, REGAD = 0x0): MII Basic Control
September 2010
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Soft reset
Loopback
Force 100
AN enable
Power down
Isolate
Restart AN
Force full
duplex
Collision test
Reserved
Hp_mdix
Force MDI
Disable MDIX
Disable far-end
fault
Disable
transmit
Disable LED
RO
R/W
R/W
R/W
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
NOT SUPPORTED
NOT SUPPORTED
Description
=1, Perform loopback, as indicated:
=0, Normal operation
=1, 100 Mbps
=0, 10 Mbps
=1, Auto-negotiation enabled
=0, Auto-negotiation disabled
=1, Power down
=0, Normal operation
=1, Restart auto-negotiation
=0, Normal operation
=1, Full duplex
=0, Half duplex
NOT SUPPORTED
=1, HP Auto MDI/MDI-X mode
=0, Micrel Auto MDI/MDI-X mode
=1, Force MDI (transmit on RXP / RXM pins)
=0, Normal operation (transmit on TXP / TXM pins)
=1, Disable auto MDI-X
=0, Enable auto MDI-X
=1, Disable far-end fault detection
=0, Normal operation
=1, Disable transmit
=0, Normal operation
=1, Disable LED
=0, Normal operation
Port 1 Loopback (reg. 29, bit 0 = ‘1’)
Port 2 Loopback (reg. 45, bit 0 = ‘1’)
Start: RXP2/RXM2 (port 2)
Loopback: PMD/PMA of port 1’s PHY
End: TXP2/TXM2 (port 2)
Start: RXP1/RXM1 (port 1)
Loopback: PMD/PMA of port 2’s PHY
End: TXP1/TXM1 (port 1)
45
Default
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
Reference
Reg. 29, bit 0
Reg. 45, bit 0
Reg. 28, bit 6
Reg. 44, bit 6
Reg. 28, bit 7
Reg. 44, bit 7
Reg. 29, bit 3
Reg. 45, bit 3
Reg. 29, bit 5
Reg. 45, bit 5
Reg. 28, bit 5
Reg. 44, bit 5
Reg. 31, bit 7
Reg. 47, bit 7
Reg. 29, bit 1
Reg. 45, bit 1
Reg. 29, bit 2
Reg. 45, bit 2
Reg. 29, bit 4
Reg. 29, bit 6
Reg. 45, bit 6
Reg. 29, bit 7
Reg. 45, bit 7
KSZ8873MLL/FLL/RLL
M9999-092309-1.2

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