KSZ8873FLLI Micrel Inc, KSZ8873FLLI Datasheet - Page 11

• Manufacturer Part Number: KSZ8873FLLI
• Description: IC ETHERNET SWITCH 3PORT 64LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8873FLLI

• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: 576-3632; KSZ8873FLLI

Micrel, Inc.
Pin Description and I/O Assignment
September 2010
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
RXM1
RXP1
AGND
TXM1
TXP1
VDDA_3.3
AGND
ISET
VDDA_1.8
RXM2
RXP2
AGND
TXM2
TXP2
FXSD2
PWRND
X1
X2
SMTXEN3
SMTXD33/
EN_REFCLKO_3
SMTXD32/
NC
SMTXD31
SMTXD30
GND
VDDIO
SMTXC3/
REFCLKI_3
SMTXER3/
MII_LINK_3
Pin Name
Type
I/O
I/O
Gnd
I/O
I/O
P
Gnd
O
P
I/O
I/O
Gnd
I/O
I/O
I
Ipu
I
O
I
lpu/I
I
I
I
Gnd
P
I/O
Ipd
(1)
Description
Physical receive or transmit signal (– differential)
Physical receive or transmit signal (+ differential)
Analog ground
Physical transmit or receive signal (– differential)
Physical transmit or receive signal (+ differential)
3.3V analog V
Analog ground.
Set physical transmit output current.
Pull-down this pin with a 11.8K 1% resistor to ground.
1.8V analog core power input from VDDCO (pin 56).
Physical receive or transmit signal (– differential)
Physical receive or transmit signal (+ differential)
Analog ground.
Physical transmit or receive signal (– differential)
Physical transmit or receive signal (+ differential)
MLL/RLL: connect to analog ground.
FLL: Fiber signal detect / factory test pin
Chip power down input (active low).
25 or 50MHz crystal/oscillator clock connections.
Pins (X1, X2) connect to a crystal. If an oscillator is used, X1 connects to
a 3.3V tolerant oscillator and X2 is a no connect.
Note: Clock is +/- 50ppm for both crystal and oscillator.
Switch MII transmit enable
MLL/FLL: Switch MII transmit data bit 3
RLL: Strap option: RMII mode Clock selection
PU = Enable REFCLKO_3 output
PD = Disable REFCLKO_3 output
MLL/FLL: Switch MII transmit data bit 2
RLL: No connection
Switch MII/RMII transmit data bit 1
Switch MII/RMII transmit data bit 0
Digital ground
3.3V, 2.5V or 1.8V digital VDD input power supply for IO with well
decoupling capacitors.
MLL/FLL: Switch MII transmit clock (MII modes only)
Output in PHY MII mode and SNI mode
Input in MAC MII and RMII mode.
RLL: Reference clock input
Note: pull up or down is needed if internal reference clock is used in RLL.
Switch MII transmit error in MII mode
0= MII link indicator from host in MII PHY mode.
1= No link on port 3 MII PHY mode and enable By-pass mode.
11
DD
KSZ8873MLL/FLL/RLL
M9999-092309-1.2