COM20019I-DZD SMSC, COM20019I-DZD Datasheet - Page 49

IC CTRLR ARCNET 2KX8 RAM 28-PLCC

COM20019I-DZD

Manufacturer Part Number
COM20019I-DZD
Description
IC CTRLR ARCNET 2KX8 RAM 28-PLCC
Manufacturer
SMSC
Series
ARCNETr
Datasheet

Specifications of COM20019I-DZD

Controller Type
ARCNET Controller
Interface
Differential
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
20mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1000-5

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Part Number
Manufacturer
Quantity
Price
Part Number:
COM20019I-DZD
Manufacturer:
SMSC
Quantity:
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Manufacturer:
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Part Number:
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SMSC COM20019I
Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Figure 8.2 - MULTIPLEXED BUS, 80XX-LIKE CONTROL SIGNALS; READ CYCLE
AD0-AD2,
D3-D7
nWR
nCS
ALE
nRD
Note 1:
Note 2:
Note 3:
*
T
T
T
T
t10
t11
t12
t13
opr
ARB
ARB
ARB
t8
t9
t1
t2
t3
t4
t5
t6
t7
is the period of operation clock. Same as the XTAL1 period.
is the Arbitration Clock Period
is identical to T
is twice T
The Microcontroller typically accesses the COM20019 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20019 cycles.
Cycle Time (nRD Low to Next Time Low)
Read cycle for Address Pointer Low/High Registers occurring after a read from
Data Register requires a minimum of 5T
leading edge of the next nRD.
Read cycle for Address Pointer Low/High Registers occurring after a write to
Data Register requires a minimum of 5T
leading edge of nRD.
nCS Setup to ALE Low
nCS Hold from ALE Low
ALE Low to nRD Low
nRD Low to Valid Data
nRD High to Data High Impedance
ALE High Width
ALE Low Width
nRD Low Width
nRD High Width
nWR
Address Setup to ALE Low
Address Hold from ALE Low
opr
t9
to nRD Low
t1
if SLOW ARB = 1
VALID
opr
t3
if SLOW ARB = 0
DATASHEET
t13
MUST BE: RBUSTMG bit = 0
t4
t2,
Parameter
Note 3
t5
Page 49
t6
ARB
ARB
from the trailing edge of nRD to the
from the trailing edge of nWR to the
t10
t11
VALID DATA
4T
min
20
10
10
10
15
ARB
20
20
60
20
20
0
t8
*
max
40
20
t7
Note 2
units
t12
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Rev. 09-25-07

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