TDA8029HL/C207,118 NXP Semiconductors, TDA8029HL/C207,118 Datasheet - Page 35

• Manufacturer Part Number: TDA8029HL/C207,118
• Description: IC SMART CARD READER 32-LQFP
• Manufacturer: NXP Semiconductors

Specifications of TDA8029HL/C207,118

• Package / Case: 32-LQFP
• Controller Type: Smart Card Reader Interface
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 6 V
• Current - Supply: 250mA
• Operating Temperature: -40°C ~ 90°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2233-2; 935274733118; TDA8029HL07BD-T

Philips Semiconductors
Table 56:
Table 57:
9397 750 14145
Product data sheet
Bit
7
6
5
4
3
2
1
0
Bit
Symbol
Reset
Access
USR - UART status register (address Eh) bit allocation
USR - UART status register (address Eh) bit description
8.10.3.1 Programmable divider register (PDR)
Symbol
TO3
TO2
TO1
EA
PE
OVR
FER
TBE/RBF
8.10.3 Card registers
TO3
7
0
When working with a card, the following registers are used for programming some specific
parameters.
This register is used for counting the card clock cycles forming the ETU. It is an
auto-reload 8 bits counter counting from the programmed value down to 0.
TO2
6
0
Description
Time-out counter 3. TO3 = 1 when counter 3 has reached its terminal count.
Time-out counter 2. TO2 = 1 when counter 2 has reached its terminal count.
Time-out counter 1. TO1 = 1 when counter 1 has reached its terminal count.
Early Answer. EA = 1 if the first start-bit on the I/O pin during ATR has been detected
between the first 200 and n
the I/O during the first 200 clock pulses with pin RST LOW are not taken into account)
and before the first n
re-initialized at each toggling of pin RST. n
TDA8029HL/C2.
Parity error.
Overrun. OVR = 1 if the UART has received a new character whilst URR was full. In this
case, at least one character has been lost.
Framing Error. FER = 1 when I/O was not in high-impedance state at 10.25 ETU after a
start-bit. It is reset when USR has been read.
Transmit Buffer Empty / Receive Buffer Full. TBE and RBF share the same bit within
register USR: when in transmission mode the relevant bit is TBE; when in reception
mode it is RBF.
In protocol T = 0, bit PE = 1 if the UART has detected a number of received characters
with parity errors equal to the number written in bits PEC[2:0] or if a transmitted
character has been NAKed by the card a number of times equal to the value
programmed in bits PEC[2:0]. It is set at 10.5 ETU in the reception mode and at
11.5 ETU in the transmission mode. A character received with a parity error is not
stored in register FIFO in protocol T = 0; the card should repeat this character.
In protocol T = 1, a character with a parity error is stored in the FIFO and the parity
error counter is not active.
TBE = 1 when the UART is in transmission mode and when the microcontroller may
write the next character to transmit in register UTR. It is reset when the microcontroller
has written data in the transmit register or when bit T/R in register UCR1 has been
reset either automatically or by software. After detection of a parity error in
transmission, it is necessary to wait 13.5 ETU before rewriting the character which has
been NAKed by the card (manual mode, see
RBF = 1 when register FIFO is full. The microcontroller may read some of the
characters in register URR, which clears bit RBF.
TO1
5
0
Rev. 03 — 22 February 2005
max
clock pulses with pin RST in HIGH state. These two features are
EA
4
0
max
clock pulses with pin RST in LOW state (all activities on
read
PE
3
0
max
= 384 for TDA8029HL/C1; n
Table
OVR
55).
Low power single card reader
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
FER
1
0
TDA8029
max
TBE/RBF
= 368 for
0
0
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