AD1981BBSTZ Analog Devices Inc, AD1981BBSTZ Datasheet - Page 6

• Manufacturer Part Number: AD1981BBSTZ
• Description: IC CODEC STEREO MICPREAMP 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1981BBSTZ

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 4 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 90
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 3 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Adc/dac Resolution: 20Bit
• Number Of Adc's: 4
• Number Of Dac's: 2
• Interface Type: AC97
• Power Supply Type: Analog/Digital
• Operating Supply Voltage (min): 3/4.5V
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.47/5.5V
• Sample Rate: 48KSPS
• Pin Count: 48
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Screening Level: Industrial
• Package Type: LQFP
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1981B
Parameter
BIT_CLK Low Pulse Width
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to Trailing Edge of RESET (Applies to SYNC, SDATA_OUT)
Rising Edge of RESET to High Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid
1
2
3
Guaranteed but not tested.
Output jitter is directly dependent on crystal input jitter.
Maximum jitter specification for noncrystal operation only. Crystal operation maximum is much lower.
SDATA_IN
BIT_CLK
RESET
BIT_CLK
SYNC
Figure 2. Cold Reset Timing (Codec is Supplying the BIT_CLK Signal)
t
t
RST_LOW
Figure 3. Warm Reset Timing
SYNC_HIGH
Rev. C | Page 6 of 32
t
t
TRI2ACTV
TRI2ACTV
t
SYNC2CLK
t
RST2CLK
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CLK_LOW
SYNC_PERIOD
SETUP
HOLD
RISECLK
FALLCLK
RISESYNC
FALLSYNC
RISEDIN
FALLDIN
RISEDOUT
FALLDOUT
S2_PDOWN
SETUP2RST
OFF
Min
32.56
5
5
2
2
2
2
2
2
2
2
0
15
Typ
38
48.0
20.8
2.5
4
4
4
4
4
4
4
4
Max
6
6
6
6
6
6
6
6
1.0
25
15
50
15
Unit
ns
kHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns