AD1981BBSTZ Analog Devices Inc, AD1981BBSTZ Datasheet - Page 16

IC CODEC STEREO MICPREAMP 48LQFP

AD1981BBSTZ

Manufacturer Part Number
AD1981BBSTZ
Description
IC CODEC STEREO MICPREAMP 48LQFP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97r
Datasheet

Specifications of AD1981BBSTZ

Data Interface
Serial
Resolution (bits)
16, 20 b
Number Of Adcs / Dacs
4 / 2
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
85 / 90
Voltage - Supply, Analog
4.5 V ~ 5.5 V
Voltage - Supply, Digital
3 V ~ 3.47 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Adc/dac Resolution
20Bit
Number Of Adc's
4
Number Of Dac's
2
Interface Type
AC97
Power Supply Type
Analog/Digital
Operating Supply Voltage (min)
3/4.5V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.47/5.5V
Sample Rate
48KSPS
Pin Count
48
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Screening Level
Industrial
Package Type
LQFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD1981BBSTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD1981B
MIC VOLUME REGISTER
Index 0x0E
Reg No.
0x0E
All registers are not shown, and bits containing an X are assumed to be reserved. Refer to Table 17 for examples.
Table 16.
Bit
MCV [4:0]
M20
MCM
Table 17. Volume Settings for Phone and MIC
D15
0
0
0
1
X is a wild card, and has no effect on the value.
LINE-IN VOLUME REGISTER
Index 0x10
Reg No.
0x10
1
Table 18.
Bit
RLV [4:0]
RM
LLV [4:0]
LVM
For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels.
If MSPLT is not set, the RM bit has no effect. All registers are not shown, and bits containing an X are assumed to be reserved. Refer to
Name
Line-In Volume
Name
MIC Volume
Line-In Volume Right
Right-Channel Mute
Line-In Volume Left
Line-In Mute
Mnemonic
Mnemonic
MIC Volume Gain
MIC Gain Boost
MIC Mute
MCM
D15
D15
LVM
X
D14
D14
X
Function
Allows setting the phone volume attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB
represents 1.5 dB, and the gain range is +12 dB to −34.5 dB. The default value is 0 dB, with the mute bit
enabled.
This bit allows setting additional MIC gain to increase the microphone sensitivity. The nominal gain
boost by default is 20 dB; however, Bits D0 and D1 (MBG [1:0]) on the miscellaneous control bits register
(0x76) allow changing the gain boost to 10 dB or 30 dB, if necessary.
0 = Disabled; Gain = 0 dB
1 = Enabled; Default Gain = 20 dB (see Register 0x76, Bits D0, D1)
When this bit is set to 1, the MIC channel is muted.
Write
0 0000
0 1000
1 1111
X XXXX
Function
Allows setting the line-in right-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to −34.5 dB. The default value is 0 dB, mute enabled.
Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from the
LM bit. Otherwise, this bit always reads 0 and has no effect when set to 1.
Allows setting the line-in left-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to −34.5 dB. The default value is 0 dB, mute enabled.
When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in
Register 0x76 is set to 1, in which case this mute bit affects only the left channel.
D13
X
D13
X
D12
X
Control Bits D [4:0] Phone (0x0C) and MIC (0x0E)
D12
LLV4
D11
X
D11
LLV3
D10
X
D10
LLV2
Rev. C | Page 16 of 32
D9
X
D9
LLV1
D8
X
Readback
0 0000
0 1000
1 1111
X XXXX
LLV0
D8
D7
X
D7
RM
D6
M20
1
D6
X
D5
X
D5
X
D4
MCV4
D4
RLV4
D3
MCV3
D3
RLV3
Function
12 dB Gain
0 dB Gain
−34.5 dB Gain
−∞ db Gain, Muted
D2
MCV2
D2
RLV2
Table 22
D1
MCV1
D1
RLV1
for examples.
D0
MCV0
D0
RLV0
0x8008
Default
Default
0x8808

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