AD1981BBSTZ Analog Devices Inc, AD1981BBSTZ Datasheet - Page 5

• Manufacturer Part Number: AD1981BBSTZ
• Description: IC CODEC STEREO MICPREAMP 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1981BBSTZ

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 4 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 90
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 3 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Adc/dac Resolution: 20Bit
• Number Of Adc's: 4
• Number Of Dac's: 2
• Interface Type: AC97
• Power Supply Type: Analog/Digital
• Operating Supply Voltage (min): 3/4.5V
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.47/5.5V
• Sample Rate: 48KSPS
• Pin Count: 48
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Screening Level: Industrial
• Package Type: LQFP
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parameter
POWER SUPPLY
CLOCK SPECIFICATIONS
1
2
POWER-DOWN STATES
Values presented with V
Table 3.
Parameter
Fully Active
ADC
DAC
ADC + DAC
Mixer
ADC + Mixer
DAC + Mixer
ADC + DAC + Mixer
Standby
Headphone Standby
TIMING PARAMETERS
Guaranteed over operating temperature range.
Table 4.
Parameter
RESET Active Low Pulse Width
RESET Inactive to BIT_CLK Start-Up Delay
SYNC Active High Pulse Width
SYNC Low Pulse Width
SYNC Inactive to BIT_CLK Start-Up Delay
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Period
BIT_CLK Output Jitter
BIT_CLK High Pulse Width
Guaranteed but not tested.
Measurements reflect main ADC.
High Level Output Voltage (V
Low Level Output Voltage (V
Input Leakage Current
Output Leakage Current
Power Supply Range—Analog (AV
Power Supply Range—Digital (DV
Power Dissipation—5 V/3.3 V
Analog Supply Current—5 V (AV
Digital Supply Current—3.3 V (DV
Power Supply Rejection (100 mV p-p Signal @ 1 kHz)
Input Clock Frequency
Recommended Clock Duty Cycle
(At Both Analog and Digital Supply Pins, Both ADCs and DACs)
1, , 2 3
REFOUT
1
not loaded.
OL
OH
), I
), I
DD
OL
OH
DD
DD
)
DD
= 2 mA
)
= 2 mA
)
)
Set Bits
No Bits Value
PR0
PR1
PR1, PR0
PR2
PR2, PR0
PR2, PR1
PR2, PR1, PR0
PR5, PR4, PR3, PR2, PR1, PR0
PR6
1
Rev. C | Page 5 of 32
Symbol
t
t
t
t
t
t
t
RST_LOW
RST2CLK
SYNC_HIGH
SYNC_LOW
SYNC2CLK
CLK_PERIOD
CLK_HIGH
Min
0.9 × DV
−10
−10
4.5
3.0
40
DV
42
36
29
12
42
36
29
12
0
42
DD
Typ
Min
162.8
162.8
32.56
DD
Typ
400
50
46
40
24.576
50
Typ
1.0
1.3
19.5
12.288
81.4
750
42
AV
51
45
35
28
24
18
9
1.5
0
44
DD
Typ
Max
0.1 × DV
+10
+10
5.5
3.47
60
Max
±1
2000
48.84
AD1981B
DD
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
ns
ns
ns
ps
ns
Unit
ms
ms
µs
MHz
ppm
µA
Unit
V
V
µA
V
V
mW
mA
mA
dB
MHz
%