EMC1423-1-AIZLTR SMSC, EMC1423-1-AIZLTR Datasheet - Page 43

• Manufacturer Part Number: EMC1423-1-AIZLTR
• Description: Board Mount Temperature Sensors TRIPLE TEMP SNSR
• Manufacturer: SMSC

Specifications of EMC1423-1-AIZLTR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ADDR.
37h
ADDR.
1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
SMSC EMC1423/EMC1424
36h
6.17
6.18
R-C
R/W
R/W
R-C
Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel exceeds its programmed high limit.
Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit.
Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit.
Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.
The Low Limit Status Register contains the status bits that are set when a temperature channel drops
below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.
Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear
the LOW status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low
limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
The THERM Limit Status Register contains the status bits that are set when a temperature channel
THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register
is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the
temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status
bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all
individual channel THERM bits are cleared.
Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds it’s programmed THERM
Limit.
Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds it’s programmed THERM
Limit.
Low Limit Status Register
THERM Limit Status Register
REGISTER
THERM
Status
Limit
Section
REGISTER
Low Limit
Status
5.3.2).
B7
-
B7
Table 6.23 THERM Limit Status Register
-
B6
Table 6.22 Low Limit Status Register
-
B6
-
B5
-
DATASHEET
B5
-
B4
-
43
B4
-
THERM
E3LOW
B3
E3
B3
THERM
E2LOW
E2
B2
B2
THERM
E1LOW
E1
B1
B1
Revision 1.36 (07-02-09)
ITHERM
ILOW
B0
B0
DEFAULT
DEFAULT
00h
00h