EMC1423-1-AIZLTR SMSC, EMC1423-1-AIZLTR Datasheet - Page 33

• Manufacturer Part Number: EMC1423-1-AIZLTR
• Description: Board Mount Temperature Sensors TRIPLE TEMP SNSR
• Manufacturer: SMSC

Specifications of EMC1423-1-AIZLTR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
SMSC EMC1423/EMC1424
6.5
ADDR
0Ah
04h
Bh - Fh
HEX
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bit 1 - DAVG_DIS - Disables the dynamic averaging feature on all temperature channels.
Bit 0 - APDD (EMC1424 only) - Disables the anti-parallel diode operation. Beta Compensation is
disabled on External Diode 2 and 3 regardless of APDD setting. In addition, External Diode 2 Beta
Configuration register will be ignored.
The Conversion Rate Register controls how often the temperature measurement channels are updated
and compared against the limits. This register is fully accessible at either address.
Bits 3-0 - CONV[3:0] - Determines the conversion rate as shown in
Conversion Rate Register
R/W
R/W
‘0’ (default) - The dynamic averaging feature is enabled. All temperature channels will be converted
with an averaging factor that is based on the conversion rate as shown in
‘1’ - The dynamic averaging feature is disabled. All temperature channels will be converted with a
maximum averaging factor of 1x (equivalent to 11-bit conversion). For higher conversion rates, this
averaging factor will be reduced as shown in
‘0’ (default) - Anti-parallel diode mode is enabled. Two external diodes will be measured on the
DP2 and DN2 pins.
‘1’ - Anti-parallel diode mode is disabled. Only one external diode will be measured on the DP2
and DN2 pins.
3
0
0
0
0
0
0
0
0
1
1
1
Conversion
REGISTER
Rate
CONV[3:0]
Table 6.5 Conversion Rate Register
Table 6.6 Conversion Rate
2
0
0
0
0
1
1
1
1
0
0
0
All others
B7
-
DATASHEET
B6
-
33
1
0
0
1
1
0
0
1
1
0
0
1
B5
-
Table 5.1
B4
-
and
0
0
1
0
1
0
1
0
1
0
1
0
B3
Table
B2
CONV[3:0]
Table
5.2.
CONVERSIONS / SECOND
6.6.
B1
Table 5.1
4 (default)
Revision 1.36 (07-02-09)
B0
16
32
64
1
2
8
1
1
1
1
1
and
DEFAULT
(4/sec)
Table
06h
5.2.