EMC2300-AZC-TR SMSC, EMC2300-AZC-TR Datasheet - Page 71

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EMC2300-AZC-TR

Manufacturer Part Number
EMC2300-AZC-TR
Description
Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
Manufacturer
SMSC
Datasheet

Specifications of EMC2300-AZC-TR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
:
SMSC EMC2300
8.2.25
Register
Address
BIT
0
1
2
3
4
5
6
7
82h
Bits[1:0], Bits[3:2], Bits[5:4], Bits[7:6]
NAME
Read/
TEMP
Write
D1EN
D2EN
R/W
AMB
RES
RES
RES
RES
Notes:
Register 82h: Interrupt Enable 3 Register
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
This register is used to enable individual thermal error events to set the corresponding status bits in
the interrupt status registers. This register also contains the group thermal enable bit (Bit[0] TEMP),
which is used to enable thermal events to force the interrupt pin (INT#) low if interrupts are enabled
(see Bit[2] INTEN of the Special Function register at offset 7Ch).
See
This register contains the following bits:
Any PWM that has no TACH inputs associated with it must be configured to operate in Mode 1.
All TACH inputs must be associated with a PWM output. If the tach is not being driven by the
associated PWM output it should be configured to operate in Mode 1 and the associated TACH
interrupt must be disabled.
Figure 6.1 Interrupt Control on page
Interrupt Enable 3 (Temp)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
00
01
10
11
Register
Table 8.48 PWM Assignment Bit Combinations
Name
Table 8.49 Register 82h: Interrupt Enable 3 Register
DEFAULT
Table 8.50 Interrupt Enable 3 Register Bits
0
1
1
1
0
0
0
0
Group Temperature enable bit - when set, allows Temperature channels
to assert the INT# pin.
When set, enables the ambient temperature monitor to update the status
registers and generate interrupts.
When set, enables the Remote Diode 1 temperature monitor to update
the status registers and generate interrupts.
When set, enables the Remote Diode 2 temperature monitor to update
the status registers and generate interrupts.
Reserved
Reserved
Reserved
Reserved
DATASHEET
(MSb)
Bit 7
RES
24.
71
Bit 6
RES
Bit 5
RES
Bit 4
RES
DESCRIPTION
PWM Associated With Tachx
D2EN
Bit 3
Reserved
PWM1
PWM2
PWM3
D1EN
Bit 2
Bit 1
AMB
Revision 0.32 (06-23-08)
TEMP
(LSb)
Bit 0
Default
Value
0Eh

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