CS4245-CQZ Cirrus Logic Inc, CS4245-CQZ Datasheet - Page 48

• Manufacturer Part Number: CS4245-CQZ
• Description: IC CODEC AUD STER 104DB 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4245-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 104 / 104
• Voltage - Supply, Analog: 3.13 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 12
• Number Of Dac Outputs: 4
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 95 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1501 - BOARD EVAL FOR CS4245 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1034

48
6.12
6.12.1 DAC Soft Ramp or Zero Cross Enable (Bits 7:6)
6.12.2 Invert DAC Output (Bit 5)
DACSoft
7
DAC Control 2 - Address 0Ch
shown in
Cross bits in the DAC Control 2 register (see
Function:
Soft Ramp Enable
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.
See
Zero Cross Enable
Zero Cross Enable dictates that signal-level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel. See
Soft Ramp and Zero Cross Enable
Soft Ramp and Zero Cross Enable dictate that signal-level changes, either by attenuation changes or mut-
ing, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will
occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sam-
ple rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel. See
Function:
When this bit is set, the output of the DAC is inverted.
Table
DACZero
DACSoft
Table
6
18.
0
0
1
1
17. The volume changes are implemented as dictated by the DACSoft and DACZero-
Table 18. DAC Soft Cross or Zero Cross Mode Selection
InvertDAC
Table
Table 17. Digital Volume Control Example Settings
DACZeroCross
5
Binary Code
00000000
00000001
00101000
00101001
11111110
11111111
18.
0
1
0
1
Reserved
4
Changes to affect immediately
Zero Cross enabled
Soft Ramp enabled
Soft Ramp and Zero Cross enabled (default)
Section
Table
Reserved
Volume Setting
18.
6.12.1).
3
-127.5 dB
-20.5 dB
-127 dB
-0.5 dB
-20 dB
0 dB
Mode
Reserved
2
Reserved
1
Active_H/L
CS4245
DS656F2
0