CS4265-CNZ Cirrus Logic Inc, CS4265-CNZ Datasheet - Page 43

• Manufacturer Part Number: CS4265-CNZ
• Description: IC CODEC 24BIT 104DB 32QFN
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4265-CNZ

• Package / Case: 32-QFN
• Data Interface: PCM Audio Interface
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 104 / 104
• Voltage - Supply, Analog: 3.13 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 4
• Number Of Dac Outputs: 2
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2S)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 95 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1001 - BOARD EVAL FOR CS4265 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1039

DS657F2
6.14
6.15
6.16
6.17
6.17.1 E to F C-Data Buffer Transfer Inhibit (Bit 6)
6.17.2 C-Data Access Mode (Bit 5)
Reserved
Reserved
Reserved
Reserved
7
7
7
Status Mask - Address 0Eh
Function:
The bits of this register serve as a mask for the Status sources found in the register
on page
register. If a mask bit is set to 0, the error is masked, meaning that its occurrence will not affect the status
register. The bit positions align with the corresponding bits in the Status register.
Status Mode MSB - Address 0Fh
Status Mode LSB - Address 10h
Function:
The two Status Mode registers form a 2-bit code for each Status register function. There are three ways to
update the Status register in accordance with the status condition. In the Rising-Edge Active Mode, the sta-
tus bit becomes active on the arrival of the condition. In the Falling-Edge Active Mode, the status bit be-
comes active on the removal of the condition. In Level-Active Mode, the status bit is active during the
condition.
00 - Rising edge active
01 - Falling edge active
10 - Level active
11 - Reserved
Transmitter Control 1 - Address 11h
Function:
When cleared, C-data E to F buffer transfers are allowed. When set, C-data E to F buffer transfers are
inhibited. See
Function:
When cleared, the C-data buffer will operate in One-byte control port access mode. When set, the C-data
buffer will operate in Two-byte control port access mode. See
agement” on page 52.
42. If a mask bit is set to 1, the error is unmasked, meaning that its occurrence will affect the status
Reserved
Reserved
Reserved
EFTCI
6
6
6
“IEC60958-3 Channel Status (C) Bit Management” on page 52.
Reserved
Reserved
Reserved
CAM
5
5
5
Reserved
EFTCM
EFTC1
EFTC0
4
4
4
Reserved
ClkErrM
ClkErr1
ClkErr0
3
3
3
“IEC60958-3 Channel Status (C) Bit Man-
Reserved
Reserved
Reserved
Reserved
2
2
2
ADCOvflM
ADCOvfl1
ADCOvfl0
Reserved
“Status - Address 0Dh”
1
1
1
ADCUndrflM
ADCUndrfl1
ADCUndrfl0
CS4265
Reserved
0
0
0
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