MPC8347CVRAGDB Freescale Semiconductor, MPC8347CVRAGDB Datasheet - Page 5

IC MPU POWERQUICC II 620-PBGA

MPC8347CVRAGDB

Manufacturer Part Number
MPC8347CVRAGDB
Description
IC MPU POWERQUICC II 620-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8347CVRAGDB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
620-PBGA
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
400MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
BGA
No. Of Pins
672
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8347CVRAGDB
Manufacturer:
FREESCA
Quantity:
13
Part Number:
MPC8347CVRAGDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8347CVRAGDB
Manufacturer:
FREESCALE
Quantity:
8 000
Freescale Semiconductor
— Can operate as a stand-alone USB host controller
— External PHY with UTMI, serial and UTMI+ low-pin interface (ULPI)
Universal serial bus (USB) multi-port host controller
— Can operate as a stand-alone USB host controller
— High-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps) operations
— Direct connection to a high-speed device without an external hub
— External PHY with serial and low-pin count (ULPI) interfaces
Local bus controller (LBC)
— Multiplexed 32-bit address and data operating at up to 133 MHz
— Eight chip selects for eight external slaves
— Up to eight-beat burst transfers
— 32-, 16-, and 8-bit port sizes controlled by an on-chip memory controller
— Three protocol engines on a per chip select basis:
— Parity support
— Default boot ROM chip select with configurable bus width (8-, 16-, or 32-bit)
Programmable interrupt controller (PIC)
— Functional and programming compatibility with the MPC8260 interrupt controller
— Support for 8 external and 35 internal discrete interrupt sources
— Support for 1 external (optional) and 7 internal machine checkstop interrupt sources
— Programmable highest priority request
— Four groups of interrupts with programmable priority
— External and internal interrupts directed to host processor
— Redirects interrupts to external INTA pin in core disable mode.
— Unique vector number for each interrupt source
Dual industry-standard I
— Two-wire interface
— Multiple master support
— Master or slave I
– USB root hub with one downstream-facing port
– Enhanced host controller interface (EHCI) compatible
– High-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps) operations
– USB root hub with one or two downstream-facing ports
– Enhanced host controller interface (EHCI) compatible
– Complies with USB Specification Rev. 2.0
– General-purpose chip select machine (GPCM)
– Three user-programmable machines (UPMs)
– Dedicated single data rate SDRAM controller
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
2
C mode support
2
C interfaces
Overview
5

Related parts for MPC8347CVRAGDB