MPC8313VRADDB Freescale Semiconductor, MPC8313VRADDB Datasheet - Page 41

• Manufacturer Part Number: MPC8313VRADDB
• Description: MPU POWERQUICC II PRO 516-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313VRADDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 267MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8313E-RDB
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 16 KB
• I/o Voltage: 2.5 V
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• Program Memory Type: EEPROM/Flash
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 27
assumes that the DC levels of the clock driver chip is compatible with MPC8313E SerDes reference clock
input’s DC requirement.
Figure 28
Since LVDS clock driver’s common mode voltage is higher than the MPC8313E SerDes reference clock
input’s allowed range (100 to 400 mV), the AC-coupled connection scheme must be used. It assumes the
LVDS output driver features a 50-Ω termination resistor. It also assumes that the LVDS transmitter
establishes its own common mode level without relying on the receiver or other external component.
Freescale Semiconductor
HCSL CLK Driver Chip
Total 50 Ω. Assume clock driver’s
output impedance is about 16 Ω.
Clock Driver
Clock Driver
Figure 27. DC-Coupled Differential Connection with HCSL Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for HCSL type clock driver. It
shows the SerDes reference clock connection reference circuits for LVDS type clock driver.
CLK_Out
CLK_Out
Figure 27
fact that the clock driver chip's internal structure, output impedance, and
termination requirements are different between various clock driver chip
manufacturers, it is possible that the clock circuit reference designs
provided by clock driver chip vendors are different from what is shown in
the figures. They might also vary from one vendor to the other. Therefore,
Freescale can neither provide the optimal clock driver reference circuits, nor
guarantee the correctness of the following clock driver connection reference
circuits. It is recommended that the system designer contact the selected
clock driver chip vendor for the optimal reference circuits for the
MPC8313E SerDes reference clock receiver requirement provided in this
document.
MPC8313E PowerQUICC
through
33 Ω
33 Ω
Figure 30
Clock driver vendor dependent
source termination resistor
100 Ω Differential PWB Trace
™
II Pro Processor Hardware Specifications, Rev. 3
are for conceptual reference only. Due to the
NOTE
SD n _REF_CLK
SD n _REF_CLK
SDn_REF_CLK
50 Ω
50 Ω
High-Speed Serial Interfaces (HSSI)
MPC8313E
SerDes Refer.
CLK Receiver
41