MPC8313VRADDB Freescale Semiconductor, MPC8313VRADDB Datasheet - Page 24

• Manufacturer Part Number: MPC8313VRADDB
• Description: MPU POWERQUICC II PRO 516-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313VRADDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 267MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8313E-RDB
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 16 KB
• I/o Voltage: 2.5 V
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• Program Memory Type: EEPROM/Flash
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Ethernet: Three-Speed Ethernet, MII Management
Figure 9
Figure 10
24
At recommended operating conditions with LV
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise V
RX_CLK clock fall time V
Note:
1. The symbols used for timing specifications follow the pattern of t
inputs and t
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of t
with the appropriate letter: R (rise) or F (fall).
provides the AC test load for TSEC.
shows the MII receive AC timing diagram.
(first two letters of functional block)(reference)(state)(signal)(state)
RXD[3:0]
RX_CLK
Parameter/Condition
Figure 10. MII Receive AC Timing Diagram RMII AC Timing Specifications
RX_DV
RX_ER
IL
Output
MPC8313E PowerQUICC
(min) to V
IH
(max) to V
Table 27. MII Receive AC Timing Specifications (continued)
MRX
IH
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
(max)
IL
t
(min)
t
MRXH
MRDVKH
DDA
Z
/
MRX
LV
0
Figure 9. TSEC AC Test Load
t
= 50 Ω
MRX
DDB
clock reference (K) going to the low (L) state or hold time. Note that, in general,
™
MRDXKL
/NV
II Pro Processor Hardware Specifications, Rev. 3
DD
of 3.3 V ± 0.3 V.
Valid Data
symbolizes MII receive timing (GR) with respect to the time data input
t
Symbol
MRXF
t
MRDXKH
t
t
(first two letters of functional block)(signal)(state)(reference)(state)
MRXR
MRXF
for outputs. For example, t
R
L
1
= 50 Ω
t
MRDXKH
t
MRXR
10.0
Min
1.0
1.0
LV
DDA
/2 or LV
MRDVKH
Typ
—
—
—
DDB
MRX
Freescale Semiconductor
symbolizes MII receive
/2
clock reference (K)
Max
4.0
4.0
—
Unit
ns
ns
ns
for