IDT79R4700-100DP IDT, Integrated Device Technology Inc, IDT79R4700-100DP Datasheet

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IDT79R4700-100DP

Manufacturer Part Number
IDT79R4700-100DP
Description
IC MPU 64BIT 5V 100MHZ 208-QFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT79R4700-100DP

Processor Type
RISC 64-Bit
Speed
100MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
208-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
79R4700-100DP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT79R4700-100DP
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT79R4700-100DP
Manufacturer:
IDT
Quantity:
20 000
Features
Block Diagram
The IDT logo is a trademark and RC32134, RC32364, RC64145, RC64474, RC64475, RC4650, RC4640, RC4600,RC4700 RC3081, RC3052, RC3051, RC3041, RISController, and RISCore are trademarks of Inte-
grated Device Technology, Inc.
© 2008 Integrated Device Technology, Inc.
– 64-bit integer operations
– 64-bit floating-point operations
– 64-bit registers
– 64-bit virtual address space
– 260 Dhrystone MIPS at 200MHz
– 100 peak MFLOP/s at 200MHz
– Two-way set associative caches
– Simple 5-stage pipeline
– 64-bit, 200 MHz integer CPU
– 64-bit floating-point unit
– 16KB instruction cache
– 16KB data cache
– Flexible MMU with large, fully associative TLB
– 3.3V power supply, for the “RV” part
– 5V power supply, for the “R” part
– Dynamic power management
– Standby mode reduces internal power
True 64-bit microprocessor
High-performance microprocessor
High level of integration
Low-power operation
Fully software & pin-compatible with 40
Available in 179-pin PGA or 208-pin QFP
Control
Add/Sub/Cvt/Div/Sqrt
Floating-point/Integer
Phase Lock Loop, Clocks
64-Bit RISC Microprocessor
Unpacker/Packer
Floating-point
Integer Divide
Floating-point
Register File
Multiply
Store Buffer
Write Buffer
Read Buffer
Data Set A
Data Set B
XX
Processor Family
DBus
SysAD
System/Memory
Coprocessor 0
Instruction Tag A
Instruction Tag B
Address Buffer
Tag
DTLB Physical
1 of 25
ITLB Physical
Control
Data Tag A
Data Tag B
Joint TLB
AuxTag
Description
pin-compatible with the R4
capabilities, the R4700 provides more computational power and data
movement bandwidth than is delivered to typical embedded systems by
32-bit processors.
microprocessor family, including the IDTRISController
R3052
475
development of R4700-based systems, allowing a variety of customers
access to the MIPS Open Architecture philosophy.
The IDT79R4700 64-bit RISC Microprocessor is both software and
The R4700 is upwardly software compatible with the IDT79R3000
DVA
IVA
– LAN switches
– Routers
– Color printers
and R5000
IBus
Available at 80-200MHz, with mode bit dependent output
clock frequencies
64GB physical address space
Processor family for a wide variety of embedded
applications
Integer/Address Adder
Instruction TLB Virtual
, R3041
Shifter/Store Aligner
Integer Register File
Program Counter
Data TLB Virtual
PC Incrementer
Branch Adder
Load Aligner
Instruction Register
Instruction Select
Logic Unit
Instruction Set A
Instruction Set B
, R3081
. An array of development tools facilitates rapid
XXX
as well as the R4640
processor family. With 64-bit processing
December 5, 2008
IDT79R4700
, R4650
79R3051
, RC64474/
DSC 9096
,

Related parts for IDT79R4700-100DP

IDT79R4700-100DP Summary of contents

Page 1

... LAN switches – Routers – Color printers Description The IDT79R4700 64-bit RISC Microprocessor is both software and pin-compatible with the R4 capabilities, the R4700 provides more computational power and data movement bandwidth than is delivered to typical embedded systems by 32-bit processors. The R4700 is upwardly software compatible with the IDT79R3000 microprocessor family, including the IDTRISController ™ ...

Page 2

... IDT79R4700 This data sheet provides an overview of the R4700’s CPU features and architecture. A more detailed description of this processor is provided in the IDT79R4700 RISC Processor Hardware User’s Manual, available from Integrated Device Technology (IDT). Information on development support, applications notes and complementary products is available on the IDT Web site www ...

Page 3

... IDT79R4700 Key to Figure 1I-1R Instruction cache access 2I Instruction virtual-to-physical address translation in ITLB 2A-2D Data cache access and load align 1D Data virtual-to-physical address translation in DTLB 1D-2D Virtual-to-physical address translation in JTLB 2R Register file read 2R Bypass calculation 2R Instruction decode 2R Branch address calculation 1A Issue or slip decision ...

Page 4

... IDT79R4700 occurrence of an interlock or stall, a required number of processor internal cycles must occur between an integer multiply or divide and a subsequent MFHI or MFLO operation. Operation 32-bit MULT DIV 42 Floating-Point Co-Processor The RC4700 incorporates a complete floating-point co-processor on chip and includes a floating-point register file and execution units. The floating-point co-processor forms a “ ...

Page 5

... IDT79R4700 The RC4700 processor also supports a supervisor mode in which the virtual address space is 256.5GB (2.5GB in 32-bit address mode), divided into three regions that are based on the high-order bits of the virtual address. If the RC4700 is configured for 64-bit virtual addressing, the virtual address space layout is an upwardly compatible extension of the 32-bit virtual address space layout ...

Page 6

... IDT79R4700 Because the cache is virtually indexed, the virtual-to-physical address translation occurs in parallel with the cache access, further increasing performance by allowing these two operations to occur simul- taneously. The tag holds a 24-bit physical address and valid bit and is parity protected. The instruction cache is 64-bits wide and can be refilled or accessed in a single processor cycle ...

Page 7

... IDT79R4700 ValidOut* and ValidIn* are used by the RC4700 and the external device respectively to indicate that there is a valid command or data on the SysAD and SysCmd buses. The RC4700 asserts ValidOut* when it is driving these buses with a valid command or data, and the external device drives ValidIn* when it has control of the buses and is driving a valid command or data ...

Page 8

... IDT79R4700 Thermal Considerations The RC4700 uses special packaging techniques to improve the thermal properties of high-speed processors. The RC4700 is packaged using cavity down packaging in a 179-pin PGA package, and a 208-lead QFP package. These packages effectively dissipate the power of the CPU, increasing device reliability. ...

Page 9

... IDT79R4700 Mode bit 0 reserved (must be zero) 4:1 Writeback data rate 0 → Δ, 1 → DDx, 2 → DDxx, 3 → DxDx, 4 → DDxxx, 5 → DDxxxx, 6 → DxxDxx, 7 → DDxxxxxx, 8 → DxxxDxxx, 9-→ reserved 7:5 Clock divisor 0 → → → → → → → reserved 0 → ...

Page 10

... IDT79R4700 TClock RClock SysAD Addr Read SysCmd ValidOut* ValidIn* RdRdy* WrRdy* Release* TClock RClock Addr SysAD Write SysCmd ValidOut* ValidIn RdRdy* WrRdy* Release* Data0 Data1 CData CData Figure 5 Processor Block Read Data0 Data1 Data2 CData CData CData Figure 6 Processor Block Write ...

Page 11

... IDT79R4700 Pin Description The table below provides a list of interface, interrupt and miscellaneous pins that are available on the RC4700. Note that signals marked with an asterisk are active when low. Boundary scan is not supported. Pin Name Type System Interface ExtRqst* I External request Signals that the system interface needs to submit an external request. ...

Page 12

... IDT79R4700 Pin Name Type Quiet V CC Quiet Quiet V SS Quiet V Interrupt Interface Int*(5:0) I Interrupt Six general processor interrupts, bit-wise ORed with bits 5:0 of the interrupt register. NMI* I Non-maskable interrupt Non-maskable interrupt, ORed with bit 6 of the interrupt register. Initialization Interface ...

Page 13

... IDT79R4700 Recommended Operation Temperature and Supply Voltage Grade Commercial DC Electrical Characteristics—R4700 ± 0°C to +85° 5 CASE Parameter R4700 80 MHz Min V — 0. — 3. –0. 2. — — — OUT I/O — LEAK Power Consumption—R4700 R4700 80 MHz Parameter Typical System 80/20 MHz Condition: — ...

Page 14

... IDT79R4700 AC Electrical Characteristics—R4700 =5.0V ± 5 0°C to +85°C) CC CASE Clock Parameters—R4700 Parameter MasterClock HIGH MasterClock LOW 1 MasterClock Frequency MasterClock Period Clock Jitter for MasterClock Clock Jitter for MasterOut, SyncOut, TClock, RClock MasterClock Rise Time MasterClock Fall Time ModeClock Period ...

Page 15

... IDT79R4700 Capacitive Load Deration—R4700 Parameter Symbol Load Derate Electrical Characteristics — RV4700 =3.3V ± 5 0°C to +85°C) CC CASE Clock Parameters Parameter Symbol MasterClock HIGH t MCHIGH MasterClock LOW t MCLOW 1 MasterClock Frequency — MasterClock Period t MCP Clock Jitter for MasterClock t JitterIn ...

Page 16

... IDT79R4700 DC Electrical Characteristics—RV4700 (V ± 0°C to +85° CASE Parameter V — — 2. –0. 0. — — — OUT I/O — LEAK RV4700 150MHz Parameter Min V — 0. 0.1V — — 0. 2.4V — –0. — ±10uA IN C — 15pF IN C — 15pF OUT I/O — ...

Page 17

... IDT79R4700 System Interface Parameters—RV4700 Note: Operation of the R4700 is only guaranteed with the Phase Lock Loop enabled. Parameter Symbol 1 Data Output t = Min Max DO Input Data Setup t DS Input Data Hold Timings are measured from 1.5V of the clock to 1.5V of the signal. Parameter ...

Page 18

... IDT79R4700 Power Consumption—RV4700 RV4700 100MHz Parameter 1 Typical Max System 100/25MHz Condition standby — 125mA — 175mA 2 I active 575mA 875mA CC 2 650mA 1100mA 2 650mA 1275mA 1. Typical integer instruction mix and cache miss rates. 2. These are not tested. They are the result of engineering analysis and are provided for reference only. ...

Page 19

... IDT79R4700 RC4700 QFP Package Pin-Out Note: N.C. pins should be left floating for maximum flexibility and compatibility with future designs. Pin Function 1 N.C. 2 N.C. 3 VSS 4 VCC 5 SysAD45 6 SysAD13 7 Fault* 8 SysAD44 9 VSS 10 VCC 11 SysAD12 12 SysCmdP 13 SysAD43 14 SysAD11 15 VSS 16 VCC 17 SysCmd8 18 SysAD42 19 SysAD10 20 SysCmd7 ...

Page 20

... IDT79R4700 Physical Specifications — 208-pin QFP December 5, 2008 ...

Page 21

... IDT79R4700 Physical Specifications - page December 5, 2008 ...

Page 22

... IDT79R4700 RC4700 PGA Package Pin-Out Note: N.C. pins should be left floating for maximum flexibility and compatibility with future designs. Function ColdReset* ExtRqst* Fault* Reserved O (NC) Reserved I (Vcc) IOIn IOOut Int0 Int1 Int2 Int3 Int4 Int5 MasterClock MasterOut ModeClock ModeIn NMI RClock0 ...

Page 23

... IDT79R4700 Function SysAD21 SysAD22 SysAD23 SysAD24 SysAD25 SysAD26 SysAD27 SysAD28 SysAD29 SysAD30 SysAD31 SysAD32 SysAD33 SysAD34 SysAD35 Pin Function T4 TClock1 C17 U5 TClock0 D16 U6 VCCOk M17 U9 ValidIn* P2 U11 ValidOut* R3 T12 WrRdy* C5 U14 VCCP K17 U15 VSSP K16 T16 VCC A2 R17 VCC A4 M16 ...

Page 24

... IDT79R4700 Physical Specifications — PGA R4700 R4000, R4400 Pinout PC Pinout Bottom Bottom 2884 drw 12 December 5, 2008 ...

Page 25

... IDT79R4700 Ordering Information 79 YY XXXX Configuration Device Type Valid Combinations 79R4700 - 80, 100, 133 - GH, DP 79RV4700 -100, 133, 150, 175, 200 - GH, DP CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 999 A A Speed Package Process/ Temperature Range for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www ...

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