Z8L18020VSC Zilog, Z8L18020VSC Datasheet - Page 45

IC 20MHZ LOW PWR S180 68-PLCC

Z8L18020VSC

Manufacturer Part Number
Z8L18020VSC
Description
IC 20MHZ LOW PWR S180 68-PLCC
Manufacturer
Zilog
Datasheet

Specifications of Z8L18020VSC

Processor Type
Z80
Features
Enhanced DMA Support
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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cleared to
tures an external
ZiLOG
to
to Low and during
ister is
(High), the receiver is reset and its operation is inhibited.
receive data pin
selects the
Register addresses
data for channel 0 and channel 1, respectively.
1
function.
when the pin is High. It is cleared to
of
requests an interrupt when
0
to select auto-enabling, and the pin is negated
0
by
function; clearing the bit to
following the pin’s transition from High
06H
for the CSI/O. Setting this bit to
.
input, which is multiplexed with the
and
. When bit 6 of the
07H
hold the ASCI transmit
Channel
goes High.
0
This bit is set
0
on the first
selects the
1
reg-
fea-
is
1
1
byte is written to
set to
if the
the pin is High,
to
1
to
, an interrupt is requested when
indicates that the
0
1
during
to the
to enable ASCI transmit interrupt requests. If
is cleared to
1
in
pin is auto-enabled in the
and then
0
.
until the ASCI transfers the byte from
mode and during
is reset to
. After the byte is written to
is empty and the next transmit data
is again set to
0
.
1
.
should be set
. On ASCI0,
register and
1
.
is cleared
is
,

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