MPC857DSLVR50B Freescale Semiconductor, MPC857DSLVR50B Datasheet - Page 53

IC MPU POWERQUICC 50MHZ 357-PBGA

MPC857DSLVR50B

Manufacturer Part Number
MPC857DSLVR50B
Description
IC MPU POWERQUICC 50MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC857DSLVR50B

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC85xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
1
2
3
4
(FE=0, CE=0)
(FE=1, CE=1)
Num
83a
The ratio SyncCLK/L1RCLK must be greater than 2.5/1.
These specs are valid for IDL mode only.
Where P = 1/CLKOUT. Thus for a 25-MHz CLKO1 rate, P = 40 ns.
These strobes and TxD on the first bit of the frame become valid after L1CLK edge or L1SYNC, whichever is later.
L1RSYNC
84
85
86
87
88
L1ST(4-1)
L1RCLK
L1RCLK
(Output)
L1RXD
(Input)
(Input)
(Input)
(Input)
L1RCLK, L1TCLK width high (DSC = 1)
L1CLK edge to L1CLKO valid (DSC = 1)
L1RQ valid before falling edge of L1TSYNC
L1GR setup time
L1GR hold time
L1CLK edge to L1SYNC valid (FSD = 00) CNT = 0000, BYT =
0, DSC = 0)
Figure 52. SI Receive Timing Diagram with Normal Clocking (DSC = 0)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
73
71
2
Characteristic
76
75
74
Table 19. SI Timing (continued)
72
70
BIT0
3
RFSD=1
4
78
77
71a
P + 10
42.00
42.00
1.00
Min
All Frequencies
79
CPM Electrical Characteristics
30.00
Max
0.00
L1TCL
Unit
ns
ns
ns
ns
ns
K
53

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