MC7447ATHX1000NB Freescale Semiconductor, MC7447ATHX1000NB Datasheet - Page 19
![IC MPU RISC 1000MHZ 360-FCCBGA](/photos/6/77/67729/mc7447athx1000nb_sml.jpg)
MC7447ATHX1000NB
Manufacturer Part Number
MC7447ATHX1000NB
Description
IC MPU RISC 1000MHZ 360-FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC7447AVS733NB.pdf
(56 pages)
Specifications of MC7447ATHX1000NB
Processor Type
MPC74xx PowerPC 32-Bit
Speed
1.0GHz
Voltage
1.1V
Mounting Type
Surface Mount
Package / Case
360-FCCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC7447ATHX1000NB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.2.3
Table 10
Figure
Figure 7
Freescale Semiconductor
At recommended operating conditions. See
TCK frequency of operation
TCK cycle time
TCK clock pulse width measured at 1.4 V
TCK rise and fall times
TRST assert time
Input setup times:
Input hold times:
Valid times:
Output hold times:
TCK to output high impedance:
Notes:
1. All outputs are measured from the midpoint voltage of the falling/rising edge of TCLK to the midpoint of the signal
2. TRST is an asynchronous level sensitive signal. The time is for test purposes only.
3. Non-JTAG signal input timing with respect to TCK.
4. Non-JTAG signal output timing with respect to TCK.
5. Guaranteed by design and characterization.
Boundary-scan data
TMS, TDI
Boundary-scan data
TMS, TDI
Boundary-scan data
TDO
Boundary-scan data
TDO
Boundary-scan data
TDO
in question. The output timings are measured at the pins. All output timings assume a purely resistive 50-Ω load
(see
19.
provides the AC test load for TDO and the boundary-scan outputs of the MPC7447A.
provides the IEEE 1149.1 (JTAG) AC timing specifications as defined in
Figure
IEEE 1149.1 AC Timing Specifications
7). Time-of-flight delays must be added for trace lengths, vias, and connectors in the system.
Table 10. JTAG AC Timing Specifications (Independent of SYSCLK)
Parameter
Output
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
Figure 7. Alternate AC Test Load for the JTAG Interface
Table
4.
Z
0
= 50 Ω
t
JR
Symbol
t
t
f
t
t
t
t
t
t
t
t
t
t
t
TRST
DXJH
TCLK
TCLK
DVJH
JHJL
and t
JLDV
JLOV
JLDX
JLOX
JLDZ
JLOZ
IVJH
IXJH
JF
R
L
= 50 Ω
Min
30
15
25
20
25
30
30
—
0
4
0
4
4
3
3
Electrical and Thermal Characteristics
OV
Max
33.3
20
25
19
—
—
—
—
—
—
—
—
—
2
9
DD
/2
Figure 16
1
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
through
Notes
4, 5
2
3
3
4
4
19