MPC8541EVTAPF Freescale Semiconductor, MPC8541EVTAPF Datasheet - Page 9

IC MPU POWERQUICC III 783-FCPBGA

MPC8541EVTAPF

Manufacturer Part Number
MPC8541EVTAPF
Description
IC MPU POWERQUICC III 783-FCPBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIIr
Datasheets

Specifications of MPC8541EVTAPF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
833MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
833MHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
1.14V To 1.26V
Rohs Compliant
Yes
Family Name
MPC85XX
Device Core
PowerQUICC III
Device Core Size
32b
Frequency (max)
833MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2V
Operating Supply Voltage (max)
1.26V
Operating Supply Voltage (min)
1.14V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
783
Package Type
FCBGA
For Use With
MPC8548CDS - DEV TOOLS CDS FOR 8548CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Items on the same line have no ordering requirement with respect to one another. Items on separate lines
must be ordered sequentially such that voltage rails on a previous step must reach 90 percent of their value
before the voltage rails on the current step reach ten percent of theirs.
2.1.3
Table 2
Table 2
conditions is not guaranteed.
Freescale Semiconductor
Core supply voltage
PLL supply voltage
DDR DRAM I/O voltage
Three-speed Ethernet I/O voltage
PCI, local bus, DUART, system control and power management,
I
Input voltage
Die-junction Temperature
2
C, and JTAG I/O voltage
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
provides the recommended operating conditions for the MPC8541E. Note that the values in
are the recommended and tested operating conditions. Proper device operation outside of these
Recommended Operating Conditions
If the items on line 2 must precede items on line 1, please ensure that the
delay does not exceed 500 ms and the power sequence is not done greater
than once per day in production environment.
From a system standpoint, if the I/O power supplies ramp prior to the V
core supply, the I/Os on the MPC8541E may drive a logic one or zero during
power-up.
Characteristic
DDR DRAM signals
DDR DRAM reference
Three-speed Ethernet signals
PCI, local bus, DUART,
SYSCLK, system control and
power management, I
JTAG signals
Table 2. Recommended Operating Conditions
2
C, and
NOTE
NOTE
Symbol
MV
GV
OV
AV
LV
MV
OV
LV
V
T
DD
REF
DD
DD
DD
DD
IN
j
IN
IN
1.3 V ± 50 mV (for 1 GHz only)
1.3 V± 50 mV (for 1 GHz only)
Recommended Value
2.5 V ± 125 mV
3.3 V ± 165 mV
2.5 V ± 125 mV
3.3 V ± 165 mV
1.2 V ± 60 mV
1.2 V ± 60 mV
GND to GV
GND to GV
GND to OV
GND to LV
0 to 105
DD
DD
DD
DD
Electrical Characteristics
DD
Unit
°C
V
V
V
V
V
V
V
V
V
9

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