MPC8349VVALFB Freescale Semiconductor, MPC8349VVALFB Datasheet - Page 72

• Manufacturer Part Number: MPC8349VVALFB
• Description: IC MPU POWERQUICC II 672-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8349VVALFB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 667MHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 672-TBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 667MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.3V
• Operating Supply Voltage (max): 1.36V
• Operating Supply Voltage (min): 1.24V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 667MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• For Use With: MPC8349E-MITX-GP - KIT REFERENCE PLATFORM MPC8349EMPC8349E-MITXE - BOARD REFERENCE FOR MPC8349MPC8349EA-MDS-PB - KIT MODULAR DEV SYSTEM MPC8349E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
Clocking
72
Core VCO frequency = core frequency × VCO divider. The VCO divider must be set properly so that the core VCO frequency
is in the range of 800–1800 MHz.
0–1
nn
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
RCWL[COREPLL]
0000
0001
0001
0001
0001
0001
0001
0001
0001
0010
0010
0010
0010
0010
0010
0010
0010
0011
0011
0011
0011
2–5
Table 61. e300 Core PLL Configuration
6
n
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
(PLL off, csb_clk clocks core directly)
core_clk : csb_clk Ratio
PLL bypassed
1.5:1
1.5:1
1.5:1
1.5:1
2.5:1
2.5:1
2.5:1
2.5:1
1:1
1:1
1:1
1:1
2:1
2:1
2:1
2:1
3:1
3:1
3:1
3:1
(PLL off, csb_clk clocks core directly)
VCO Divider
PLL bypassed
Freescale Semiconductor
2
4
8
8
2
4
8
8
2
4
8
8
2
4
8
8
2
4
8
8
1