MPC859TVR133A Freescale Semiconductor, MPC859TVR133A Datasheet - Page 72

• Manufacturer Part Number: MPC859TVR133A
• Description: IC MPU POWERQUICC 133MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC859TVR133A

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 133MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 133 MHz
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 133MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

UTOPIA AC Electrical Specifications
Figure 71
13 UTOPIA AC Electrical Specifications
Table 30
72
Num
Num
U1
U2
U3
U4
U1
U2
U3
U4
SDA
SCL
through
shows the I
UtpClk rise/fall time (Internal clock option)
Duty cycle
Frequency
UTPB, SOC, RxEnb, TxEnb, RxAddr, and TxAddr-active
delay (and PHREQ and PHSEL active delay in MPHY mode)
UTPB, SOC, Rxclav and Txclav setup time
UTPB, SOC, Rxclav and Txclav hold time
UtpClk rise/fall time (Internal clock option)
Duty cycle
Frequency
UTPB, SOC, RxEnb, TxEnb, RxAddr and TxAddr active
delay (PHREQ and PHSEL active delay in MPHY mode)
UTPB_Aux, SOC_Aux, Rxclav, and Txclav setup time
UTPB_Aux, SOC_Aux, Rxclav, and Txclav hold time
205
Table 32
202
Table 31. UTOPIA Master (Split Bus Mode) Electrical Specifications
2
Table 30. UTOPIA Master (Muxed Mode) Electrical Specifications
C bus timing.
206
show the AC electrical specifications for the UTOPIA interface.
Signal Characteristic
Signal Characteristic
203
MPC866/MPC859 Hardware Specifications, Rev. 2
Figure 71. I
207
209
2
C Bus Timing Diagram
204
210
Direction
Direction
Output
Output
Output
Output
Input
Input
Input
Input
208
Min
Min
50
50
—
—
—
—
2
4
1
2
4
1
Max
Max
Freescale Semiconductor
211
50
33
16
—
—
50
33
16
—
—
4
4
Unit
MHz
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
%
%