MPC8241LZQ200D Freescale Semiconductor, MPC8241LZQ200D Datasheet - Page 55

• Manufacturer Part Number: MPC8241LZQ200D
• Description: IC MPU 32BIT 200MHZ PPC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8241LZQ200D

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 200MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: MPC82XX
• Device Core: PowerQUICC II
• Device Core Size: 32b
• Frequency (max): 200MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
Revision
6.1
8
7
6
5
12/19/2005 Document—Imported new template and made minor editoral corrections.
05/11/2004 Section 4.1.4 —Table 4: Changed the default for drive strength of DRV_STD_MEM.
Date
—
—
—
Section 4.3.1—Before Figure 7, added paragraph for using DLL mode that provides lowest locked
tap point read in 0xE3.
Section 4.3.2—After Figure 12, added a sentence to introduce Figure 13.
Section 4.3.3—After Table 11, added a sentence to introduce Figure 14.
Section 4.3.4—After Table 13, added to the sentence to introduce Figures 16 thru 19.
Section 4.3.6—After Table 16, added a sentence to introduce Figures 22 thru 25.
Section 5.3—Updated the driver and I/O assignment information for the multiplexed PCI clock and
DUART signals. Added note for HRST_CPU and HRST_CTRL, which had been mentioned only in
Figure 2.
Section 9.2—Updated the part ordering specifications for the extended temperature parts. Also
updated Section 9.2 to reflect what we offer for new orders. Updated Figure 34 to match with current
part marking format.
Section 8.3—Added new section for part marking information.
Section 4.3.1 —Table 8: Changed the wording for item 15 description.
Section 4.3.4 —Table 10: Changed T
for SDRAM_SYNC_IN description relative to T
Section 4.3.1 — Table 9: Corrected last row to state the correct description for the bit setting: Max
tap delay, DLL extend. Figure 8: Corrected the label name for the DLL graph to state “DLL Locking
Range Loop Delay vs. Frequency of Operation for DLL_Extend=1 and Normal Tap Delay”
Section 4.1.2 — Figure 2: Added note 6 and related label for latching of the PLL_CFG signals.
Section 4.1.3 — Updated specifications for the input high and input low voltages of PCI_SYNC_IN.
Section 4.3.1 — Table 8: Corrected typo for first number 1a to 1; Updated characteristics for the DLL
lock range for the default and remaining three DLL locking modes; Reworded note description for
note 6. Replaced contents of Table 9 with bit descriptions for the four DLL locking modes. In Figures
7 through 10, updated the DLL locking mode graphs.
Section 4.3.2 — Table 10: Changed the name of references for timing parameters from
SDRAM_SYNC_IN to sys_logic_clk to be consistent with Figure 11. Followed the same change for
note 2.
Section 4.3.3— Table 11: Changed the name of references for timing parameters from
SDRAM_SYNC_IN to sys_logic_clk to be consistent with Figure 11. Followed the same change for
note 2.
Section 5.3 — Table 17: Removed extra listing of DRDY in test/configuration signal list and updated
relevant notes for signal in memory Interface signal listing. Updated note #20. Added note 24 for the
signals of the UART interface.
Section 7.6 — Added relevant notes to this section and updated Figure 29.
Section 5.1— Updated package information to include all package offerings.
Section 5.2 — Included package case outline for ZP (Rev. B) packaging parts.
Section 9 — Updated Part markings for the offerings of the MPC8241.
All sections — Nontechnical reformatting
MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Table 21. Revision History Table (continued)
Substantive Change(s)
os
range and wording in note 7; Figure 11: changed wording
OS
.
Document Revision History
55