MPC8241LZQ200D Freescale Semiconductor, MPC8241LZQ200D Datasheet - Page 28

• Manufacturer Part Number: MPC8241LZQ200D
• Description: IC MPU 32BIT 200MHZ PPC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8241LZQ200D

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 200MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: MPC82XX
• Device Core: PowerQUICC II
• Device Core Size: 32b
• Frequency (max): 200MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Electrical and Thermal Characteristics
Figure 17
4.7
Table 14
recommended operating conditions (see
LV
28
Notes:
1. See the MPC8245 Integrated Processor Reference Manual for a description of the PIC interrupt control register (ICR) and
2. S_RST, S_FRAME, and S_INT shown in
3. The sys_logic_clk waveform is the clocking signal of the internal peripheral logic from the output of the peripheral logic PLL;
Num
S_CLK frequency programming.
and do not describe functional relationships between S_RST, S_FRAME, and S_INT. The MPC8245 Integrated Processor
Reference Manual describes the functional relationships between these signals.
sys_logic_clk is the same as SDRAM_SYNC_IN when the SDRAM_SYNC_OUT to SDRAM_SYNC_IN feedback loop is
implemented and the DLL is locked. See the MPC8245 Integrated Processor Reference Manual for a complete clocking
description.
DD
1
2
3
4
5
6
7
SDA
SCL
= 3.3 V ± 0.3 V.
S_CLK frequency
S_CLK duty cycle
S_CLK output valid time
Output hold time
S_FRAME, S_RST output valid time
S_INT input setup time to S_CLK
S_INT inputs invalid (hold time) to S_CLK
provides the PIC serial interrupt mode AC timing specifications for the MPC8241 at
PIC Serial Interrupt Mode AC Timing Specifications
shows the AC timing diagram for the I
S
t
I2CF
t
I2CL
t
I2SXKL
Characteristic
Table 14. PIC Serial Interrupt Mode AC Timing Specifications
MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Figure 17. I
t
I2DXKL,
Figure 18
t
Table
I2DVKH
t
I2OVKL
t
I2CH
2
and
C Bus AC Timing Diagram
1 sys_logic_clk period + 2
1/14 SDRAM_SYNC_IN
2) with GV
t
2
Figure
I2SXKL
C bus.
Min
19, depict timing relationships to sys_logic_clk and S_CLK
40
—
—
—
0
Sr
DD
t
_OV
I2SVKH
t
I2KHKL
DD
1 sys_logic_clk period + 6
1/2 SDRAM_SYNC_IN
= 3.3 V ± 5% and
t
I2PVKH
Max
60
—
—
6
0
t
I2CR
Freescale Semiconductor
P
t
I2CF
Unit
MHz
ns
ns
ns
ns
ns
%
S
Notes
—
—
—
1
2
2
2