CY7C64613-80NC Cypress Semiconductor Corp, CY7C64613-80NC Datasheet - Page 15

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CY7C64613-80NC

Manufacturer Part Number
CY7C64613-80NC
Description
IC MCU USB EZ FX 8K RAM 80-PQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX™r
Datasheet

Specifications of CY7C64613-80NC

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C646xx
Ram Size
8K x 8
Interface
I²C, USB, USART
Number Of I /o
32
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-MQFP, 80-PQFP
For Use With
428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1312

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3.2
Document #: 38-08005 Rev. **
Port C
128
110
112
113
111
82
83
84
85
86
CY7C646xx Pin Descriptions
80
50
51
52
53
54
68
69
70
71
52
32
33
34
35
36
43
44
45
46
PB3 or
PB4 or
PB5 or
PB6 or
PB7 or
TXD1 or
D[3] or
GDA[3] or
AFI [3]
INT4 or
D[4] or
GDA[4] or
AFI [4]
INT5# or
D[5] or
GDA[5] or
AFI [5]
INT6 or
D[6] or
GDA[6] or
AFI [6]
T2OUT or
D[7] or
GDA[7] or
AFI [7]
PC0 or
RXD0 or
RDY0
PC1 or
TXD0 or
RDY1
PC2 or
INT0#
PC3 or
INT1# or
RDY3
Name
Type
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
(continued)
Default
(PB3)
(PB4)
(PB5)
(PB6)
(PB7)
(PC0)
(PC1)
(PC2)
(PC3)
I
I
I
I
I
I
I
I
I
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.3 and IFCONFIG[1..0].
PB3 is a bidirectional I/O port pin.
TXD1is an active-HIGH output pin from 8051 UART1, which pro-
vides the output clock in sync mode, and the output data in async
mode.
AFI [3] is the bidirectional A-FIFO data bus.
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.4 and IFCONFIG[1..0].
PB4 is a bidirectional I/O port pin.
INT4 is the 8051 INT4 interrupt request input signal. The INT4 pin
is edge-sensitive, active HIGH.
AFI [4] is the bidirectional A-FIFO data bus.
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.5 and IFCONFIG[1..0].
PB5 is a bidirectional I/O port pin.
INT5# is the 8051 INT5 interrupt request input signal. The INT5 pin
is edge-sensitive, active LOW.
AFI [5] is the bidirectional A-FIFO data bus.
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.6 and IFCONFIG[1..0].
PB6 is a bidirectional I/O port pin.
INT6 is the 8051 INT5 interrupt request input signal. The INT6 pin
is edge-sensitive, active HIGH.
AFI [6] is the bidirectional A-FIFO data bus.
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.7 and IFCONFIG[1..0].
PB7 is a bidirectional I/O port pin.
T2OUT is the active-HIGH output signal from 8051 Timer2. T2OUT
is active (HIGH) for one clock cycle when Timer/Counter 2 over-
flows.
AFI [7] is the bidirectional A-FIFO data bus.
Multiplexed pin whose function is selected by the PORTCCFG.0 and
PORTCGPIF.0 bits.
PC0 is a bidirectional I/O port pin.
RXD0 is the active-HIGH RXD0 input to 8051 UART0, which pro-
vides data to the UART in all modes.
RDY0 is a GPIF input signal.
Multiplexed pin whose function is selected by the PORTCCFG.1 and
PORTCGPIF.1 bits.
PC1 is a bidirectional I/O port pin.
TXD0 is the active-HIGH TXD0 output from 8051 UART0, which
provides the output clock in sync mode, and the output data in async
mode.
RDY1 is a GPIF input signal.
Multiplexed pin whose function is selected by the PORTCCFG.2 bit.
PC2 is a bidirectional I/O port pin.
INT0# is the active-LOW 8051 INT0 interrupt input signal, which is
either edge triggered (IT0 = 1) or level triggered (IT0 = 0).
Multiplexed pin whose function is selected by the: PORTCCFG.3
and PORTCGPIF.3 bits.
PC3 is a bidirectional I/O port pin.
INT1# is the active-LOW 8051 INT1 interrupt input signal, which is
either edge triggered (IT1 = 1) or level triggered (IT1 = 0).
RDY3 is a GPIF input signal.
Description
CY7C64601/603/613
Page 15 of 42

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