Z9035112PSC Zilog, Z9035112PSC Datasheet - Page 36

• Manufacturer Part Number: Z9035112PSC
• Description: IC 64KW DIG TV CTRL OTP 52-SDIP
• Manufacturer: Zilog

Specifications of Z9035112PSC

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (128 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 2K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 25
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 52-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

NOPs between ADC accesses are omitted.
LD SR,%#20; select RegBank1
LD A,EXT4; turn “ADC data packing” mode on
OR A, #%0200;
LD EXT4, A;
LD A, EXT4; read first ADC sample, A = %0005
LD A, EXT4; read second ADC sample, A = %005E
LD A, EXT4; read third ADC sample, A = %05E7
LD A, EXT4; read forth ADC sample, A= %5E74
LD A, EXT4; read fifth ADC sample, first sample is thrown away, A = %E741
The ADC is controlled by the external register R4(1).
Pulse Width Modulation is used in conjunction with external low-pass filters to perform
digital-to-analog conversion. Six PWMs (8-bit resolution each) generate signals for the
control of video and sound attributes. In case of a chassis employing a frequency synthesis
tuner, these PWMs can also control video or sound attributes.
Each PWM circuit features a data register whose contents are set under program control.
The data in the register determines the ratio of PWM High to PWM Low time. PWM data
registers are not initialized when reset. In order to eliminate a potential glitch on a PWM
output, it is recommended to initialize PWM data registers before enabling the VCOs.
External registers R0(2) to R5(2) are data registers for PWM1 to PWM6 accordingly.
2
There are two hardware modules that support standard I
C bus protocol according to the
2
2
I
C bus specification published by Phillips in 1992, entitled I
C Peripherals for
Microcontrollers Data Handbook.