Z9035112PSC Zilog, Z9035112PSC Datasheet - Page 182

• Manufacturer Part Number: Z9035112PSC
• Description: IC 64KW DIG TV CTRL OTP 52-SDIP
• Manufacturer: Zilog

Specifications of Z9035112PSC

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (128 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 2K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 25
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 52-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The Z90356 provides the ability to
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In a typical system, normal transmission is received and demodulated. The signals
received from the color decoder and deflection unit control the CRT display. To display
characters generated by the Z90356 requires a video multiplexor which enables the CRT
display’s RGB signals and synchronization to be controlled by the video outputs from the
processor. When the controller has to display a character on the screen, the multiplexor is
switched, and the processor’s video signals appear on the display.
The band-limited, A/C-coupled composite video signal is clamped internally to the
negative reference voltage (REF–) during the back porch interval. It is then passed to the
analog-to-digital converter through a 6:1 multiplexor. The digital signal is then decoded to
extract the closed-caption text embedded in the video signal. The characters received are
generated as video signals and are then passed to the display.
When a detectable composite video signal is received, the SYNC separator extracts the
horizontal and vertical synchronization signals and passes them to the deflection module
of the television. The FLYBACK signals from the deflection coils are fed back to the
Z90356. The controller uses these signals to align its video signals with those of the
normal display. If the composite video signal is not present, video synchronization is
provided by the controller. In this case, the SYNC signal pins are set to be outputs. The
pins then feed to the deflection unit which controls the display. The SYNC generators can
be configured to provide either HSYNC and VSYNC, or H-FLYBACK and V-FLYBACK.
Analog functions such as volume and color controls can be controlled by pulse width
modulated outputs from the Z90356. Additional digital controls like channel fine tuning
are controlled via the serial I
An infrared remote control receiver can be directly decoded through the capture register,
and keypad input can be scanned by directly controlling I/O pins as keyscan ports.
The processor clock is available by referencing an internal phase locked loop to an
external 32.768 KHz crystal oscillator. The oscillator minimizes EMI emissions from the
clock circuitry. The internal system clock frequency can be selected as 12.058 MHz in
normal operation or 32.768 KHz in low power consumption SLEEP mode (usually used if
decode closed-caption transmissions
display characters on the screen
manipulate analog and digital control circuits
monitor keypad and infrared signals directly
generate OSD if the Z90356 receives vertical and horizontal synchronization signals
2
C bus.