CY7C63743-PC Cypress Semiconductor Corp, CY7C63743-PC Datasheet - Page 30

• Manufacturer Part Number: CY7C63743-PC
• Description: IC MCU 8K LS USB/PS-2 24-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63743-PC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C637xx
• Ram Size: 256 x 8
• Interface: PS2, USB
• Number Of I /o: 16
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1324

Bit [7:3]: Reserved.
Bit [2:1]: EP2,1 Interrupt Enable
Document #: 38-08022 Rev. *B
Read/Write - - - - -
Bit Name
A USB bus reset is indicated by a single ended zero (SE0)
on the USB D+ and D– pins. The USB Bus Reset interrupt
occurs when the SE0 condition ends. PS/2 activity is indi-
cated by a continuous LOW on the SDATA pin. The PS/2
interrupt occurs as soon as the long LOW state is detected.
During the entire interval of a USB Bus Reset or PS/2 inter-
rupt event, the USB Device Address register is cleared.
The Bus Reset/PS/2 interrupt may occur 128 µs after the
bus condition is removed.
1 = Enable
0 = Disable
There are two non-control endpoint (EP2 and EP1) inter-
rupts. If enabled, a non-control endpoint interrupt is gener-
ated when:
Reset
• The USB host writes valid data to an endpoint FIFO.
Bit #
Figure 21-2. Endpoint Interrupt Enable Register
However, if the endpoint is in ACK OUT modes, an in-
7 6 5 4 3
0 0 0 0 0
Reserved
(Address 0x21)
Interrupt
Enable
EP2
R/W
2
0
FOR
FOR
Interrupt
Enable
EP1
R/W
1
0
Interrupt
Enable
EP0
R/W
0
0
Refer to Table 22-1 for more information.
Bit 0: EP0 Interrupt Enable
1 = Enable
0 = Disable
If enabled, a control endpoint interrupt is generated when:
1 = Enable EP0 interrupt
0 = Disable EP0 interrupt
• The device SIE sends a NAK or STALL handshake pack-
• The device receives an ACK handshake after a success-
• The device SIE sends a NAK or STALL handshake pack-
• The endpoint 0 mode is set to accept a SETUP token.
• After the SIE sends a 0-byte packet in the status stage
• The USB host writes valid data to an endpoint FIFO.
• The device SIE sends a NAK or STALL handshake pack-
• The device SIE sends a NAK or STALL handshake pack-
terrupt is generated regardless of data packet validity
(i.e., good CRC). Firmware must check for data validity.
et to the USB host during the host attempts to read data
from the endpoint (INs).
ful read transaction (IN) from the host.
et to the USB host during the host attempts to write data
(OUTs) to the endpoint FIFO.
of a control transfer.
However, if the endpoint is in ACK OUT modes, an in-
terrupt is generated regardless of what data is received.
Firmware must check for data validity.
et to the USB host during the host attempts to read data
from the endpoint (INs).
et to the USB host during the host attempts to write data
(OUTs) to the endpoint FIFO.
CY7C63722
CY7C63723
CY7C63743
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