CY7C63743-PC Cypress Semiconductor Corp, CY7C63743-PC Datasheet - Page 10

• Manufacturer Part Number: CY7C63743-PC
• Description: IC MCU 8K LS USB/PS-2 24-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63743-PC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C637xx
• Ram Size: 256 x 8
• Interface: PS2, USB
• Number Of I /o: 16
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1324

9.0
The chip can be clocked from either the internal on-chip clock,
or from an oscillator based on an external resonator/crystal, as
shown in Figure 9-1. No additional capacitance is included on
chip at the XTALIN/OUT pins. Operation is controlled by the
Clock Configuration Register, Figure 9-2.
Bit 7: Ext. Clock Resume Delay
Document #: 38-08022 Rev. *B
Read/Write
Bit Name
External Clock Resume Delay bit selects the delay time
when switching to the external oscillator from the internal
oscillator mode, or when waking from suspend mode with
the external oscillator enabled.
1 = 4 ms delay.
0 = 128 µs delay.
The delay gives the oscillator time to start up. The shorter
time is adequate for operation with ceramic resonators,
while the longer time is preferred for start-up with a crystal.
(These times do not include an initial oscillator start-up
time which depends on the resonating element. This time
is typically 50–100 µs for ceramic resonators and 1–10 ms
for crystals). Note that this bit only selects the delay time for
the external clock mode. When waking from suspend mode
with the internal oscillator (Bit 0 is LOW), the delay time is
only 8 µs in addition to a delay of approximately 1 µs for the
oscillator to start.
Reset
Bit #
Clocking
(to Microcontroller)
Clk2x (12 MHz)
Clk1x (6 MHz)
(to USB SIE)
Int Clk Output Disable
Ext. Clock
Resume
Ext Clk Enable
Delay
R/W
7
0
Internal Osc
Port 2.1
R/W
Figure 9-2. Clock Configuration Register (Address 0xF8)
Wake-up Timer Adjust Bit [2:0]
6
0
FOR
FOR
Doubler
Clock
Figure 9-1. Clock Oscillator On-chip Circuit
R/W
5
0
R/W
4
0
Bit [6:4]: Wake-up Timer Adjust Bit [2:0]
Bit 3: Low-voltage Reset Disable
The Wake-up Timer Adjust Bits are used to adjust the
Wake-up timer period.
If the Wake-up interrupt is enabled in the Global Interrupt
Enable Register, the microcontroller will generate wake-up
interrupts periodically. The frequency of these periodical
wake-up interrupts is adjusted by setting the Wake-up Tim-
er Adjust Bit [2:0], as described in Section 11.2. One com-
mon use of the wake-up interrupts is to generate periodical
wake-up events during suspend mode to check for chang-
es, such as looking for movement in a mouse, while main-
taining a low average power.
When V
ue of V
the microcontroller enters a partial suspend state for a pe-
riod of t
Program execution begins from address 0x0000 after this
t
START
Low-voltage
Disable
Reset
R/W
delay period. This provides time for V
LVR
CC
START
3
0
) and the Low-voltage Reset circuit is enabled,
drops below V
(see Section 26.0 for the value of t
Precision
Clocking
Enable
USB
R/W
2
0
LVR
(see Section 25.0 for the val-
Internal
Disable
Output
Clock
R/W
1
0
CY7C63722
CY7C63723
CY7C63743
XTALOUT
XTALIN
Page 10 of 49
CC
Oscillator
External
Enable
to stabilize
R/W
0
0
START
).