CY7C63413C-PVXC Cypress Semiconductor Corp, CY7C63413C-PVXC Datasheet - Page 20

• Manufacturer Part Number: CY7C63413C-PVXC
• Description: IC MCU 8K USB LS PERIPH 48-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C63413C-PVXC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C634xx
• Ram Size: 256 x 8
• Interface: PS2, USB
• Number Of I /o: 32
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• No. Of I/o's: 32
• Ram Memory Size: 256Byte
• Cpu Speed: 12MHz
• No. Of Timers: 2
• Digital Ic Case Style: SSOP
• Supply Voltage Range: 4V To 5.25V
• Core Size: 8 Bit
• Program Memory Size: 8KB
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: CY7C63xx
• Core: M8B
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: PS2, USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 1
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P02
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1852

12-bit Free-running Timer
The 12-bit timer provides two interrupts (128 s and 1.024 ms)
and allows the firmware to directly time events that are up to 4 ms
in duration. The lower 8 bits of the timer can be read directly by
the firmware. Reading the lower 8 bits latches the upper 4 bits
Timer (LSB)
Table 22. Timer Register
Timer (MSB)
Table 23. Timer Register
Document #: 38-08027 Rev. *E
Reserved
Timer
Bit 7
R
Addr: 0x24
Addr: 0x25
11
L3
Reserved
D3
Timer
Bit 6
R
10
L2
D2
9
L1
D1
Reserved
8
L0
Timer
Bit 5
D0
R
7
D7
6
Figure 6. Timer Block Diagram
D6
Reserved
Timer Register (MSB)
Timer Register (LSB)
Timer
Bit 4
5
R
D5
4
D4
3
into a temporary register. When the firmware reads the upper 4
bits of the timer, it is actually reading the count stored in the
temporary register. The effect of this logic is to ensure a stable
12-bit timer value can be read, even when the two reads are
separated in time.
Timer
Timer
Bit 11
Bit 3
D3
R
R
2
D2
1
D1
Timer
Timer
Bit 10
8
Bit 2
0
R
R
D0
1.024-ms interrupt
128-
1-MHz clock
To Timer Register
Timer
Timer
Bit 1
Bit 9

R
R
s interrupt
CY7C63413C
CY7C63513C
CY7C63613C
Timer
Timer
Bit 0
Bit 8
Page 20 of 36
R
R
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