AT94K05AL-25AQU Atmel, AT94K05AL-25AQU Datasheet - Page 87
AT94K05AL-25AQU
Manufacturer Part Number
AT94K05AL-25AQU
Description
IC FPSLIC 5K GATE 25MHZ 100-TQFP
Manufacturer
Atmel
Series
FPSLIC®r
Datasheet
1.AT94K05AL-25AJI.pdf
(204 pages)
Specifications of AT94K05AL-25AQU
Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
4K-16K
Fpga Sram
2kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
256
Fpga Gates
5K
Fpga Registers
436
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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1138I–FPSLI–1/08
Table 4-11.
Notes:
Table 4-12.
Input with Pull-up - INTPn
Input with Pull-up - RXn
Enable Clock - XTAL 1
2-wire Serial
I/O Ports
Enable Output - PXn
Enable Output - TXn
1. Observe-only scan cell.
2. AVR Reset is High (one) if AVRResetn activated (Low) and enabled or the device is in
TOSC
Clock In - TOSC 1
Data Out/In - PXn
(2)
general reset (Resetn or power-on) or configuration download.
Clock In - XTAL1
Data Out - TXn
Pull-up - PXn
AVR I/O Boundary Scan – JTAG Instructions $0/$2 (Continued)
Bit EXTEST and SAMPLE_PRELOAD
Pull-up - TXn
Bit Type
EXTEST
Defines value driven if enabled.
Capture-DR grabs signal on pad.
1 = output drive enabled.
Capture-DR grabs output enable
scan latch.
1 = pull-up disabled.
Capture-DR grabs pull-up control
from the AVR.
Observe only. Capture-DR grabs
signal from pad.
Defines value driven if enabled.
Capture-DR grabs signal on pad.
1 = output drive enabled.
Capture-DR grabs output enable
scan latch.
1 = pull-up disabled.
Capture-DR grabs pull-up control
from the AVR.
Observe only. Capture-DR grabs
signal from pad.
Observe only. Capture-DR grabs
signal from pad.
1 = clock disabled. Capture-DR
grabs clock enable from the AVR.
Observe only. Capture-DR grabs
signal from pad.
Enable Clock - TOSC 1
AT94KAL Series FPSLIC
Enable Output - SDA
Enable Output - SCL
Clock Out/In - SCL
Clock In - TOSC 1
Data Out/In - SDA
Description
AVR Reset
SAMPLE_PRELOAD
Capture-DR grabs signal from
pad if output disabled, or from the
AVR if the output drive is enabled.
Capture-DR grabs output enable
from the AVR.
Capture-DR grabs pull-up control
from the AVR.
Capture-DR grabs signal from
pad.
Capture-DR always grabs “0”
since Tx input is NC and tied to
ground internally.
Capture-DR grabs output enable
from the AVR.
Capture-DR grabs pull-up control
from the AVR.
Capture-DR grabs signal from
pad.
Capture-DR grabs signal from
pad if clock is enabled, “1” if
disabled.
Capture-DR grabs enable from
the AVR.
Capture-DR grabs signal from
pad if clock is enabled, “1” if
disabled.
6
4
2
0
Bit
5
3
1
(1)
(1)
(1)
(1)
-> TDO
87
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