AT94K10AL-25AQC Atmel, AT94K10AL-25AQC Datasheet - Page 15
AT94K10AL-25AQC
Manufacturer Part Number
AT94K10AL-25AQC
Description
IC FPSLIC 10K GATE 25MHZ 100TQFP
Manufacturer
Atmel
Series
FPSLIC®r
Specifications of AT94K10AL-25AQC
Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
20K-32K
Fpga Sram
4kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
576
Fpga Gates
10K
Fpga Registers
846
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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1138I–FPSLI–1/08
The FPGA clocks from the AVR are effected differently in the various sleep modes of the AVR,
see
The source clock into the FPGA GCK5 and GCK6 will determine what happens during the vari-
ous power-down modes of the AVR.
If the XTAL clock input is used as an FPGA clock (GCK5 or GCK6) in Idle mode, it will still be
running. In Power-down/save mode the XTAL clock input will be off.
If the TOSC clock input is used as an FPGA clock (GCK6) in Idle mode, it will still be running in
Power-save mode but will be off in Power-down mode.
If the Watchdog Timer is used as an FPGA clock (GCK6) and was enabled in the AVR, it will be
running in all sleep modes.
Table 2-1.
Mode
Idle
Power-save
Power-down
Table
2-1.
Clock Activity in Various Modes
Clock Source
XTAL
TOSC
WDT
XTAL
TOSC
WDT
XTAL
TOSC
WDT
GCK5
Active
Not Available
Not Available
Inactive
Not Available
Not Available
Inactive
Not Available
Not Available
AT94KAL Series FPSLIC
GCK6
Active
Active
Active
Inactive
Active
Active
Inactive
Inactive
Active
15
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