AT94K05AL-25AJI Atmel, AT94K05AL-25AJI Datasheet - Page 47
AT94K05AL-25AJI
Manufacturer Part Number
AT94K05AL-25AJI
Description
IC FPSLIC 5K GATE 25MHZ 84PLCC
Manufacturer
Atmel
Series
FPSLIC®r
Specifications of AT94K05AL-25AJI
Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
4K-16K
Fpga Sram
2kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
256
Fpga Gates
5K
Fpga Registers
436
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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1138I–FPSLI–1/08
Figure 4-6.
Figure 4-7
operation using two register operands is executed, and the result is stored back to the destina-
tion register.
Figure 4-7.
The internal data SRAM access is performed in two system clock cycles as described in
Figure
Figure 4-8.
Register Operands Fetch
2nd Instruction Execute
AVR CLK
3rd Instruction Execute
1st Instruction Execute
ALU Operation Execute
Address
2nd Instruction Fetch
3rd Instruction Fetch
4th Instruction Fetch
1st Instruction Fetch
4-8.
Total ExecutionTime
Data
Data
WR
Result Write Back
RD
shows the internal timing concept for the register file. In a single clock cycle an ALU
The Parallel Instruction Fetches and Instruction Executions
Single Cycle ALU Operation
On-chip Data SRAM Access Cycles
AVR CLK
AVR CLK
Prev. Address
T1
T1
T1
Address
T2
AT94KAL Series FPSLIC
T2
T2
T3
T3
T3
T4
T4
T4
47
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